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公开(公告)号：KR1020090059430A
公开(公告)日：2009-06-11
申请号：KR1020070126290
申请日：2007-12-06
CPC classification number: H04L1/0013 , H03M13/2778 , H03M13/2792
Abstract: An apparatus and a method for processing a signal are provided to consecutively encode a plurality of code blocks by collecting a rate matching result bit of an information bit and a parity bit into a bit stream. An encoder(150) encodes an input signal, and outputs an information bit, a first parity bit, and a second parity bit. A rate matching device(160) collects a rate matching result bit of the information bit, the first parity bit, and the second parity bit into a bit stream while rate-matching the information bit, the first parity bit, and the second parity bit. A block interleaver(170) block-interleaves the bit stream. A collecting period and a block interleaving period are overlapped.
Abstract translation: 提供了一种用于处理信号的装置和方法，用于通过将信息比特和奇偶校验比特的速率匹配结果比特收集到比特流中来对多个码块进行连续编码。 编码器（150）对输入信号进行编码，并输出信息比特，第一奇偶校验位和第二奇偶校验位。 速率匹配装置（160）将信息比特，第一奇偶校验位和第二奇偶校验比特的速率匹配结果比特收集到比特流中，同时对信息比特，第一奇偶校验位和第二奇偶校验位进行速率匹配 。 块交织器（170）块比特流进行交织。 收集周期和块交织周期重叠。
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公开(公告)号：KR1020090059280A
公开(公告)日：2009-06-11
申请号：KR1020070126042
申请日：2007-12-06
CPC classification number: H04L9/06 , H04L25/03866 , H04L2012/5673
Abstract: An apparatus for generating a scrambling sequence is provided to perform a parallel processing of a signal by outputting a scrambling sequence having the number of bits corresponding to a digital modulation order. A first shift register(R100) moves a plurality of first bits as the number of bits corresponding to a digital modulation order per a clock. A second shift register(R200) moves a plurality of second bits as the number of bits corresponding to a digital modulation order per a clock. A plurality of first exclusive OR operation parts(300) outputs a scrambling sequence as the number of bits corresponding to a digital modulation order per a clock. Each first exclusive OR operation part operates at least one among a plurality of first bits and at least one among a plurality of second bits, and generates one bit of the scrambling sequence.
Abstract translation: 提供一种用于产生加扰序列的装置，通过输出具有对应于数字调制阶数的位数的加扰序列来执行信号的并行处理。 第一移位寄存器（R100）将多个第一位移动为每个时钟对应于数字调制阶数的位数。 第二移位寄存器（R200）将多个第二位移动为每个时钟对应于数字调制阶数的位数。 多个第一异或运算部分（300）输出加扰序列作为每个时钟对应于数字调制阶数的比特数。 每个第一异或运算部分操作多个第一比特和多个第二比特中的至少一个中的至少一个，并产生加扰序列的一个比特。
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公开(公告)号：KR1020090054172A
公开(公告)日：2009-05-29
申请号：KR1020070120903
申请日：2007-11-26
IPC: G06F17/10
CPC classification number: G06F17/10
Abstract: 역탄젠트 계산 장치는 정의역의 분모의 유효 비트수를 계산하고, 정의역의 분자의 유효 비트수를 계산한다. 또한, 역탄젠트 계산 장치는 분모의 유효 비트수와 분자의 유효 비트수의 차이를 계산하여, 차이를 통해 정의역에 대한 역탄젠트 결과를 계산한다.
이로써, 역탄젠트 계산 방법 및 장치는 적은 하드웨어를 이용하여 역탄젠트 함수를 계산할 수 있다.
역탄젠트-
公开(公告)号：KR1020080039785A
公开(公告)日：2008-05-07
申请号：KR1020070098706
申请日：2007-10-01
CPC classification number: H04L5/0053 , H04B7/0604 , H04J11/0076 , H04L5/0023 , H04L5/005 , H04L27/2692
Abstract: A method and an apparatus for creating common channels in an uplink are provided to improve the receive ability of mobile stations by efficiently allocating resources in the case of creating common channels in a downlink. An apparatus for creating common channels for an uplink in a base station having a plurality of antennas comprises a common channel generation part(100), an antenna mapping part(400), a multiplexing part(500), and a scrambling part(600). The common channel generation part generates common channel signals to create a common channel to transmit common data which will be provided to a plurality of mobile stations through the downlink. The antenna mapping part maps the generated common channel signals to the antennas respectively. The multiplexing part receives the mapped common channel signals according to the antennas, sequentially allocates them to subcarriers and time resources, and outputs a single symbol. Using a scramble sequence, the scrambling part scrambles the outputted symbol.
Abstract translation: 提供一种用于在上行链路中创建公共信道的方法和装置，用于通过在下行链路中创建公共信道的情况下有效地分配资源来提高移动台的接收能力。 一种用于在具有多个天线的基站中创建用于上行链路的公共信道的装置，包括公共信道生成部分（100），天线映射部分（400），复用部分（500）和加扰部分（600） 。 公共信道生成部分生成公共信道信号以创建公共信道以发送将通过下行链路提供给多个移动台的公共数据。 天线映射部分将所生成的公共信道信号分别映射到天线。 多路复用部分根据天线接收映射的公共信道信号，顺序地将它们分配给子载波和时间资源，并输出单个符号。 使用加扰序列，加扰部分加扰输出的符号。
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公开(公告)号：KR1020030052820A
公开(公告)日：2003-06-27
申请号：KR1020010082919
申请日：2001-12-21
IPC: H04L12/28
Abstract: PURPOSE: An AAL type conversion device in a wireless communication base station is provided to install an AAL type converter in a base station, and to simultaneously receive many channels having optional VPIs/VCIs, thereby efficiently using T1/E1 links and enabling channel expansion by expanding a CAM(Content Addressable Memory) and a DPRAM. CONSTITUTION: A CAM(35) is mapped with header information of an ATM cell, and outputs new header information. A type confirmer(31) determines whether to type-convert or bypass the inputted ATM cell. An AAL5/2 converter(32) converts a determined AAL5-type ATM cell into an AAL2-type ATM cell. A DPRAM(36) stores a packet if the AAL5-type ATM cell is not assembled to the AAL2-type ATM cell. A bypass unit(33) stores at least one ATM cell to be bypassed. A cell multiplexer(34) selectively outputs the ATM cell stored in the AAL5/2 converter(32) and the bypass unit(33).
Abstract translation: 目的：提供一种无线通信基站中的AAL型转换装置，用于在基站中安装AAL型转换器，同时接收具有可选VPI / VCI的多个信道，从而有效地利用T1 / E1链路， 扩展CAM（内容寻址内存）和DPRAM。 构成：CAM（35）被映射为ATM信元的标题信息，并且输出新的报头信息。 类型确认器（31）确定是否对所输入的ATM信元进行转换或绕过。 AAL5 / 2转换器（32）将确定的AAL5型ATM信元转换成AAL2型ATM信元。 如果AAL5型ATM信元未组装到AAL2型ATM信元，则DPRAM（36）存储分组。 旁路单元（33）存储要旁路的至少一个ATM信元。 单元复用器（34）选择性地输出存储在AAL5 / 2转换器（32）和旁路单元（33）中的ATM信元。
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Patent Agency Ranking
公开(公告)号：KR1020020053970A
公开(公告)日：2002-07-06
申请号：KR1020000082199
申请日：2000-12-26
IPC: H04L12/28
CPC classification number: H04L12/5601 , H04L2012/5656 , H04L2012/5658 , H04Q11/0478
Abstract: PURPOSE: A mode conversion apparatus and method of an ATM cell are provided to increase an efficiency of a link and an internal system by enabling AAL2 format ATM cell and an AAL5 format ATM cell to be mutually converted, and be adopted to processing a multi-channel by improving a processing speed by implementing an AAL2/AAL5 converting unit as a hardware. CONSTITUTION: A receiving unit(300) receive an AAL2 format ATM cell, separates it by channels, is assigned a new channel value, generates an AAL5 format ATM cell and transmits it. A transmitting unit(350) receives AAL5 format ATM traffic, generates an AAL2 format ATM cell and transmits it. A CPU interface module(399) controls the AAL2/AAL5 converting unit and monitors its state by setting a value of an internal register of the converting unit. The receiving unit(300) includes a receiving input processor(310) for receiving the AAL2 format ATM traffic and separating it by ATM channels; a receiving AAL2 processor(320) for dividing and storing the data separated by the receiving input processor(310) by packets, and generates a new data, a receiving AAL5 synthesizer(330) for generating a channel of the ATM cell generated from the receiving AAL2 processor and the data separated by combination of the channels of each packet as an AAL5 format ATM cell, and a receiving output processor(340) for transmitting the ATM cell generated from the AAL5 synthesizer(330). The transmitting unit(350) includes a transmission input processor(360) for receiving the AAL5 format ATM traffic and converting a header; a transmission AAL5 processor(370) for separating and storing the header by channel information and processing the AAL5, an AAL2 synthesizer(380) for generating an AAL2 format ATM cell by using the data separated in the transmission AAL5 processor(370) and new header information, and a transmission output processor(390) for transmitting the ATM cell generated form the AAL2 synthesizer(380).
Abstract translation: 目的：提供ATM信元的模式转换装置和方法，通过使AAL2格式的ATM信元和AAL5格式的ATM信元相互转换来提高链路和内部系统的效率， 通过实现AAL2 / AAL5转换单元作为硬件来提高处理速度。 构成：接收单元（300）接收AAL2格式的ATM信元，通过信道分离，分配新的信道值，生成AAL5格式的ATM信元并进行发送。 发送单元（350）接收AAL5格式的ATM业务，生成AAL2格式的ATM信元并发送。 CPU接口模块（399）通过设置转换单元的内部寄存器的值来控制AAL2 / AAL5转换单元并监视其状态。 接收单元（300）包括接收输入处理器（310），用于接收AAL2格式的ATM业务并通过ATM信道分离; 接收AAL2处理器（320），用于通过分组分割和存储由接收输入处理器（310）分离的数据，并生成新数据;接收AAL5合成器（330），用于生成从接收产生的ATM信元的信道 AAL2处理器，并且通过每个分组的信道的组合作为AAL5格式的ATM信元分离的数据以及用于发送从AAL5合成器（330）生成的ATM信元的接收输出处理器（340）。 发送单元（350）包括用于接收AAL5格式的ATM业务并转换报头的发送输入处理器（360） 用于通过信道信息分离和存储报头并处理AAL5的传输AAL5处理器（370），用于通过使用在传输AAL5处理器（370）中分离的数据和新报头来产生AAL2格式的ATM信元的AAL2合成器（380） 信息，以及用于发送从AAL2合成器（380）生成的ATM信元的发送输出处理器（390）。
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公开(公告)号：KR100932273B1
公开(公告)日：2009-12-16
申请号：KR1020070128432
申请日：2007-12-11
Abstract: A terminal modem control device and a method thereof are provided to optimize the control time of a terminal modem by being operated according to a designed interrupt in consideration of the operation timing of the mobile modem. A control channel receiving controller(212) stores control information of a downlink control channel in the first control buffer. A data channel receiving controller(213) delivers the control information stored in the first control buffer to an upper layer. A transmission channel controller(214) stores control information of an uplink data channel in the second control buffer.
Abstract translation: 提供终端调制解调器控制设备及其方法，以考虑到移动调制解调器的操作定时，通过根据设计的中断进行操作来优化终端调制解调器的控制时间。 控制信道接收控制器（212）将下行链路控制信道的控制信息存储在第一控制缓冲器中。 数据信道接收控制器（213）将存储在第一控制缓冲器中的控制信息传送到上层。 传输信道控制器（214）将上行数据信道的控制信息存储在第二控制缓冲器中。
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公开(公告)号：KR1020090065169A
公开(公告)日：2009-06-22
申请号：KR1020070132632
申请日：2007-12-17
IPC: G06F17/14
CPC classification number: G06F17/141
Abstract: A discrete Fourier transform apparatus and a method therefor are provided to reduce delay time due to discrete Fourier transform through the same operation modules, thereby improving performance of a mobile communication system. A storage unit(100) stores factors included in an input sequence. An operation unit(200) generates symbols corresponding to each factor. A controller(300) controls input and output of 24 buffers by generating address information about the 24 buffers. The controller controls the first operation unit(210) and the second operation unit(230) based on the address information.
Abstract translation: 提供了一种离散付里叶变换装置及其方法，用于通过相同的操作模块减少由离散傅立叶变换引起的延迟时间，从而提高移动通信系统的性能。 存储单元（100）存储包括在输入序列中的因子。 操作单元（200）产生对应于每个因子的符号。 控制器（300）通过产生关于24个缓冲器的地址信息来控制24个缓冲器的输入和输出。 控制器基于地址信息控制第一操作单元（210）和第二操作单元（230）。
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公开(公告)号：KR1020090061424A
公开(公告)日：2009-06-16
申请号：KR1020070128432
申请日：2007-12-11
CPC classification number: H04L27/0002 , H04W28/14 , H04W28/18
Abstract: A terminal modem control device and a method thereof are provided to optimize the control time of a terminal modem by being operated according to a designed interrupt in consideration of the operation timing of the mobile modem. A control channel receiving controller(212) stores control information of a downlink control channel in the first control buffer. A data channel receiving controller(213) delivers the control information stored in the first control buffer to an upper layer. A transmission channel controller(214) stores control information of an uplink data channel in the second control buffer.
Abstract translation: 提供终端调制解调器控制装置及其方法，以便考虑到移动调制解调器的操作定时，根据所设计的中断来优化终端调制解调器的控制时间。 控制信道接收控制器（212）在第一控制缓冲器中存储下行链路控制信道的控制信息。 数据信道接收控制器（213）将存储在第一控制缓冲器中的控制信息传送到上层。 传输信道控制器（214）将上行链路数据信道的控制信息存储在第二控制缓冲器中。
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公开(公告)号：KR1020080039788A
公开(公告)日：2008-05-07
申请号：KR1020070101624
申请日：2007-10-09
CPC classification number: H04B7/2637 , H04B7/12 , H04L5/0007
Abstract: A method and an apparatus for transmitting and receiving downlink control and packet data are provided to reduce the number of control channels to be detected and efficiently use transmission resources by using a control indication channel to indicate whether to transmit a control channel. A downlink control and packet data transmitter comprises a transmission control part(270), a control channel creation part(220), a control indication channel creation part(230), a data channel creation part(240), a multiplexing part(250), and a channel transmission part(260). The transmission control part receives an input signal(210) from the external and controls packet data transmission using internal control signals. The control channel creation part creates a control channel to transmit control information for packet data according to the control of the transmission control part. Under the control of the transmission control part, the control indication channel creation part creates a control indication channel to indicate whether to transmit the control channel. The data channel creation part creates a data channel under the control of the transmission control part. The multiplexing part receives the control channel, the control indication channel, the data channel, and other channel signals to be transmitted and effectively executes multiplexing for them. The transmission part outputs the multiplexed channels through an output signal(280).
Abstract translation: 提供了用于发送和接收下行链路控制和分组数据的方法和装置，以减少要检测的控制信道的数量，并通过使用控制指示信道来有效地使用传输资源来指示是否发送控制信道。 下行链路控制和分组数据发射机包括传输控制部分（270），控制信道创建部分（220），控制指示信道创建部分（230），数据信道创建部分（240），复用部分（250） ，以及通道发送部（260）。 传输控制部分从外部接收输入信号（210）并使用内部控制信号控制分组数据传输。 控制信道生成部根据发送控制部的控制，生成用于发送分组数据的控制信息的控制信道。 在传输控制部分的控制下，控制指示信道创建部分创建指示是否发送控制信道的控制指示信道。 数据信道创建部分在传输控制部分的控制下创建数据信道。 复用部分接收要发送的控制信道，控制指示信道，数据信道和其他信道信号，并且有效地执行它们的复用。 发送部分通过输出信号（280）输出多路复用的信道。
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