公开(公告)号：KR100329967B1

公开(公告)日：2002-03-27

申请号：KR1019990061162

申请日：1999-12-23

Applicant: 한국전자통신연구원

Inventor： 이해동 ,  최재원

IPC: G06F12/08

Abstract: 본발명은레이드(RAID) 시스템에관한것으로, 프로세서및 호스트가연결된시스템버스를가지는레이드시스템에있어서, 상기시스템버스에연결된디스크인터페이스와, 디스크채널을통해상기디스크인터페이스에연결된디스크와, 상기디스크인터페이스에직접연결되고상기디스크의데이터중에서자주참조되는데이터를저장하는디스크캐쉬를구성요소로하는디스크캐쉬블럭을분산구성함에의해, 디스크캐쉬과정을다중분산한레이드시스템을실현하여, 레이드시스템의성능및 아키텍쳐의모듈화측면에서효과적인디스크캐쉬방법이가능하고, 또한각 디스크캐쉬의갱신이필요할경우마다시스템버스를점유하는문제점을해결하였다.

公开(公告)号：KR1020010057762A

公开(公告)日：2001-07-05

申请号：KR1019990061162

申请日：1999-12-23

Applicant: 한국전자통신연구원

Inventor： 이해동 ,  최재원

IPC: G06F12/08

Abstract: PURPOSE: A RAID system having distributed disk cache architecture is provided to increase the efficiency of whole disk cache by directly connecting a disk cache to a disk interface instead of putting the disk cache in a system bus or a processor local memory bus. CONSTITUTION: A RAID system having a system bus(22) connected to a processor(24) and a host(28) includes a plurality of disk cache blocks(100A,100B,100C). Each disk cache block(100A,100B,100C) is composed of disk interfaces(30A,30B,30C) connected to the system bus(22), disks(32A,32B,32C) connected to the disk interfaces(30A,30B,30C) and disk caches(34A,34B,34C) directly connected to the disk interfaces(30A,30B,30C) which store data frequently referred among data of the disks(32A,32B,32C).

Abstract translation: 目的：提供具有分布式磁盘缓存架构的RAID系统，通过将磁盘缓存直接连接到磁盘接口来提高整个磁盘缓存的效率，而不是将磁盘缓存置于系统总线或处理器本地存储器总线中。 构成：具有连接到处理器（24）和主机（28）的系统总线（22）的RAID系统包括多个盘缓存块（100A，100B，100C）。 每个磁盘缓存块（100A，100B，100C）由连接到系统总线（22）的磁盘接口（30A，30B，30C）组成，连接到磁盘接口（30A，30B， 30C）和直接连接到磁盘接口（30A，30B，30C）的磁盘高速缓存（34A，34B，34C），其存储在盘（32A，32B，32C）的数据之间经常参考的数据。

公开(公告)号：KR1020030051996A

公开(公告)日：2003-06-26

申请号：KR1020010081721

申请日：2001-12-20

Applicant: 한국전자통신연구원

Inventor： 최재원

IPC: G06F13/14

CPC classification number: G06F11/1076

Abstract: PURPOSE: An RAID(Redundant Arrays of Inexpensive Disks) controller having a disk cache memory controller and a parity operation device, and a method for operating a parity are provided to respectively optimize the entire stripe write and the partial stripe write in order to remove the unnecessary data transfer on a new parity data calculation process accompanying to the write of new data blocks. CONSTITUTION: The RAID controller includes the parity operation device(220) taking an independent control architecture for each stripe write mode, and a memory control part(210) transferring the data received from a host system to the parity operation device(220) without passing an input/output bus. The memory control part(210) includes a memory controller(211) receiving the data from the host system, a read buffer(215) storing the read data from the host system, and a write buffer(213) storing the write data from the host system. The parity operation device(220) includes an entire stripe write mode controller(223), a partial stripe write mode controller(221), a parity data buffer(225), and an XOR device(227) operating the parity data.

Abstract translation: 目的：提供具有磁盘高速缓冲存储器控制器和奇偶校验操作装置的RAID（廉价磁盘冗余阵列）控制器和用于操作奇偶校验的方法，以分别优化整个条带写入和部分条带写入，以便去除 对新写入数据块的新奇偶数据计算过程进行不必要的数据传输。 构成：RAID控制器包括为每个条带写入模式采用独立控制架构的奇偶校验操作装置（220），以及存储器控制部分（210），将从主机系统接收的数据传送到奇偶校验操作装置（220）而不通过 输入/输出总线。 存储器控制部分（210）包括从主机系统接收数据的存储器控​​制器（211），存储来自主机系统的读取数据的读取缓冲器（215）和存储来自主机系统的写入数据的写入缓冲器（213） 主机系统。 奇偶校验操作装置（220）包括整个条带写入模式控制器（223），部分条形写入模式控制器（221），奇偶校验数据缓冲器（225）和操作奇偶校验数据的异或装置（227）。

公开(公告)号：KR100423812B1

公开(公告)日：2004-03-22

申请号：KR1020010081721

申请日：2001-12-20

Applicant: 한국전자통신연구원

Inventor： 최재원

IPC: G06F13/14

CPC classification number: G06F11/1076

Abstract: PURPOSE: An RAID(Redundant Arrays of Inexpensive Disks) controller having a disk cache memory controller and a parity operation device, and a method for operating a parity are provided to respectively optimize the entire stripe write and the partial stripe write in order to remove the unnecessary data transfer on a new parity data calculation process accompanying to the write of new data blocks. CONSTITUTION: The RAID controller includes the parity operation device(220) taking an independent control architecture for each stripe write mode, and a memory control part(210) transferring the data received from a host system to the parity operation device(220) without passing an input/output bus. The memory control part(210) includes a memory controller(211) receiving the data from the host system, a read buffer(215) storing the read data from the host system, and a write buffer(213) storing the write data from the host system. The parity operation device(220) includes an entire stripe write mode controller(223), a partial stripe write mode controller(221), a parity data buffer(225), and an XOR device(227) operating the parity data.

Abstract translation: 目的：提供具有磁盘高速缓冲存储器控制器和奇偶校验操作装置的RAID（廉价磁盘冗余阵列）控制器和用于操作奇偶校验的方法，以分别优化整个条带写入和部分条带写入，以便去除 在伴随新数据块的写入的新奇偶校验数据计算过程中进行不必要的数据传送。 组成：RAID控制器包括对每个条纹写入模式采取独立控制体系结构的奇偶校验操作设备（220），以及存储器控制部分（210），其将从主机系统接收到的数据传送到奇偶校验操作设备（220） 一个输入/输出总线。 存储器控制部分（210）包括从主机系统接收数据的存储器控​​制器（211），存储来自主机系统的读取数据的读取缓冲器（215）以及存储来自主机系统的写入数据的写入缓冲器（213） 主机系统。 奇偶校验操作设备（220）包括操作奇偶校验数据的整个条带写入模式控制器（223），部分条带写入模式控制器（221），奇偶校验数据缓冲器（225）和XOR设备（227）。