公开(公告)号：US20140332945A1

公开(公告)日：2014-11-13

申请号：US14338754

申请日：2014-07-23

Applicant: Analog Devices, Inc.

Inventor： Li Chen ,  Mitul Dalal

IPC: B81C1/00 ,  B81B7/00

CPC classification number: B81C1/00269 ,  B81B7/0058 ,  B81C1/00333 ,  B81C1/00523 ,  B81C2203/0118 ,  H01L21/4803 ,  H01L21/50 ,  H01L23/04 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method of etching a plurality of cavities in a wafer provides a wafer having a patterned hard mask layer. The patterned hard mask has open areas defining locations for first cavities and second cavities. A mask is applied to cover the patterned hard mask layer. The mask is etched to remove wafer material from areas defined by the second cavities. The mask is removed and etching then removes wafer material except as prevented by the hard mask layer. This leaves the first cavities with a first depth and further deepens the second cavities to a depth greater than the first depth. By suitably configuring the second cavities, a capped die can be formed by securing the wafer to a second wafer and removing at least a portion of the unsecured side of the first wafer to expose the second cavities, thereby forming a plurality of caps on the second wafer.

Abstract translation: 蚀刻晶片中的多个空腔的方法提供具有图案化硬掩模层的晶片。 图案化的硬掩模具有限定第一腔和第二腔的位置的开放区域。 施加掩模以覆盖图案化的硬掩模层。 蚀刻掩模以从由第二腔限定的区域中去除晶片材料。 除去掩模，然后蚀刻除去硬掩模层所防止的晶片材料。 这使得第一空腔具有第一深度并且进一步将第二空腔加深至大于第一深度的深度。 通过适当地构造第二空腔，可以通过将晶片固定到第二晶片并且移除第一晶片的不安全侧的至少一部分以暴露第二空腔来形成封盖的裸片，由此在第二晶圆上形成多个盖 晶圆。

公开(公告)号：US20140131850A1

公开(公告)日：2014-05-15

申请号：US13673124

申请日：2012-11-09

Applicant: ANALOG DEVICES, INC.

Inventor： Li Chen ,  Thomas Kieran Nunan ,  Kuang L. Yang

IPC: B81B7/00 ,  B81C3/00

CPC classification number: B81C3/001 ,  B81B7/007 ,  B81C1/00269 ,  B81C2203/0109 ,  B81C2203/019 ,  B81C2203/035

Abstract: A microchip has a base die with a conductive interconnect and an isolation trench around at least a portion of the conductive interconnect, and a cap die secured to the base die. A seal, formed from a metal material, is positioned between the base die and the cap die to secure them together. The microchip also has a blocking apparatus, between the isolation trench and the metal seal, that at least in part prevents the metal material from contacting the interconnect.

Abstract translation: 微芯片具有基底裸片，其具有导电互连和围绕导电互连的至少一部分的隔离沟槽，以及固定到基模的帽模。 由金属材料形成的密封件位于基模和盖模之间，以将它们固定在一起。 微芯片还具有在隔离沟槽和金属密封件之间的阻挡装置，至少部分地防止金属材料与互连件接触。