-
公开(公告)号:DE69930894D1
公开(公告)日:2006-05-24
申请号:DE69930894
申请日:1999-06-16
Applicant: INFINEON TECHNOLOGIES AG , IBM , TOSHIBA KAWASAKI KK
Inventor: RENGARAJAN RAJESH , SRINIVASAN RADHIKA , INOUE HIROFUMI , BEINTNER JOCHEN
IPC: H01L21/76 , H01L21/762 , H01L27/08
Abstract: A method for forming a electrically isolated semiconductor devices in a silicon body. A trench is formed in a selected region of the body. A barrier material is deposited over sidewalls of the trench. Portions of the barrier material are removed from a first sidewall portion of the trench to expose such first sidewall portion of the trench while leaving portions of such barrier material on a second sidewall portion of the trench to form a barrier layer thereon. A dielectric material is deposited in the trench, a portion of dielectric material being deposited on the exposed first sidewall portion of the trench and another portion of such deposited dielectric material being deposited on the barrier material. The dielectric material is annealed in an oxidizing environment to densify such deposited dielectric material, the barrier layer inhibiting oxidation of the said second sidewall portion of the trench. A plurality of the semiconductor devices is formed in the silicon body with such devices being electrically isolated by the dielectric material in the trench.
-
公开(公告)号:DE69904690D1
公开(公告)日:2003-02-06
申请号:DE69904690
申请日:1999-10-14
Applicant: SIEMENS AG , IBM
Inventor: JOACHIM HANS-OLIVER , MANDELMAN JACK A , RENGARAJAN RAJESH
IPC: H01L21/76 , H01L21/762 , H01L21/8238 , H01L27/08 , H01L27/092 , H01L29/78
Abstract: A semiconductor structure comprises first gate conductors which wrap around N-wells (301) of buried-channel P-type metal oxide semiconductor field effect transistors and second gate conductors which do not wrap around P-wells (300) of surface-channel N-type metal oxide semiconductor field effect transistors and a method of manufacturing the same comprises forming insulators (302) adjacent each of the N-wells and the P-wells, protecting the N-wells with a patterned mask, forming first divots (320) in areas of the insulators adjacent the N-wells and forming second divots in areas of the insulators adjacent P-wells, wherein the first divots have a greater depth than the second divots.
-