公开(公告)号：US20190259128A1

公开(公告)日：2019-08-22

申请号：US16256441

申请日：2019-01-24

Applicant: Intel Corporation

Inventor： Abhishek Venkatesh ,  Prasoonkumar Surti ,  Slawomir Grajewski ,  Louis Feng ,  Kai Xiao ,  Tomasz Janczak ,  Devan Burke ,  Travis T. Schluessler

IPC: G06T1/20 ,  G06T1/60

Abstract: An embodiment of a graphics apparatus may include a tile candidate identifier to determine if a compute kernel is a tile candidate, and a compute kernel tiler communicatively coupled to the tile candidate identifier to tile the compute kernel if the compute kernel is determined to be a tile candidate. Other embodiments are disclosed and claimed.

公开(公告)号：US10347357B2

公开(公告)日：2019-07-09

申请号：US15495143

申请日：2017-04-24

Applicant: Intel Corporation

Inventor： Altug Koker ,  Travis T. Schluessler ,  Ankur N. Shah ,  Abhishek R. Appu ,  Joydeep Ray ,  Jonathan Kennedy

IPC: G11C29/00 ,  G11C29/44 ,  G11C29/52 ,  G11C17/18 ,  G11C29/12 ,  G11C29/36 ,  G11C29/04

Abstract: Systems, apparatuses and methods provide for technology that identifies a redundant portion of a packaged on-die memory and detects, during a field test of the packaged on-die memory, one or more failed cells in the packaged on-die memory. Additionally, the technology identifies whether the redundant portion includes one or more remaining memory cells, and in response to an identification that the redundant portion includes the one or more remaining memory cells, the one or more remaining memory cells in the redundant portion are substituted for the one or more failed memory cells.

公开(公告)号：US20190205736A1

公开(公告)日：2019-07-04

申请号：US15858014

申请日：2017-12-29

Applicant: Intel Corporation

Inventor： Amit Bleiweiss ,  Abhishek Venkatesh ,  Gokce Keskin ,  John Gierach ,  Oguz Elibol ,  Tomer Bar-On ,  Huma Abidi ,  Devan Burke ,  Jaikrishnan Menon ,  Eriko Nurvitadhi ,  Pruthvi Gowda Thorehosur Appajigowda ,  Travis T. Schluessler ,  Dhawal Srivastava ,  Nishant Patel ,  Anil Thomas

IPC: G06N3/063 ,  G06N5/04 ,  G06N3/04 ,  G06N99/00 ,  G06F9/38 ,  G06N3/08 ,  G06T1/20

CPC classification number: G06N3/063 ,  G06F9/3887 ,  G06N3/04 ,  G06N3/08 ,  G06N5/046 ,  G06N20/00 ,  G06T1/20

Abstract: An apparatus to facilitate compute optimization is disclosed. The apparatus includes a at least one processor to perform operations to implement a neural network and compute logic to accelerate neural network computations.

公开(公告)号：US10317976B2

公开(公告)日：2019-06-11

申请号：US15611876

申请日：2017-06-02

Applicant: Intel Corporation

Inventor： Travis T. Schluessler ,  Russell J. Fenger

IPC: G06F1/32 ,  G06F9/50 ,  G06F1/3206 ,  G06F1/20 ,  G06F1/3287 ,  G06F1/329 ,  G06F1/3203 ,  G06F1/3234

Abstract: An apparatus, method and system is described herein for efficiently balancing performance and power between processing elements based on measured workloads. If a workload of a processing element indicates that it is a bottleneck, then its performance may be increased. However, if a platform or integrated circuit including the processing element is already operating at a power or thermal limit, the increase in performance is counterbalanced by a reduction or cap in another processing elements performance to maintain compliance with the power or thermal limit. As a result, bottlenecks are identified and alleviated by balancing power allocation, even when multiple processing elements are operating at a power or thermal limit.

公开(公告)号：US20180307984A1

公开(公告)日：2018-10-25

申请号：US15494971

申请日：2017-04-24

Applicant: Intel Corporation

Inventor： Altug Koker ,  Abhishek R. Appu ,  Kamal Sinha ,  Joydeep Ray ,  Balaji Vembu ,  Elmoustapha Ould-Ahmed-Vall ,  Sara S. Baghsorkhi ,  Anbang Yao ,  Kevin Nealis ,  Xiaoming Chen ,  John C. Weast ,  Justin E. Gottschlich ,  Prasoonkumar Surti ,  Chandrasekaran Sakthivel ,  Farshad Akhbari ,  Nadathur Rajagopalan Satish ,  Liwei Ma ,  Jeremy Bottleson ,  Eriko Nurvitadhi ,  Travis T. Schluessler ,  Ankur N. Shah ,  Jonathan Kennedy ,  Vasanth Ranganathan ,  Sanjeev Jahagirdar

IPC: G06N3/08 ,  G06N99/00

CPC classification number: G06N3/08 ,  G06F9/28 ,  G06F9/505 ,  G06N3/0445 ,  G06N3/0454 ,  G06N3/0481 ,  G06N3/063 ,  G06N99/005

Abstract: In an example, an apparatus comprises a plurality of execution units comprising at least a first type of execution unit and a second type of execution unit and logic, at least partially including hardware logic, to analyze a workload and assign the workload to one of the first type of execution unit or the second type of execution unit. Other embodiments are also disclosed and claimed.

公开(公告)号：US20180307295A1

公开(公告)日：2018-10-25

申请号：US15493243

申请日：2017-04-21

Applicant: Intel Corporation

Inventor： Mohammed Tameem ,  Altug Koker ,  Kiran C. Veernapu ,  Abhishek R. Appu ,  Ankur N. Shah ,  Joydeep Ray ,  Travis T. Schluessler ,  Jonathan Kennedy

IPC: G06F1/32 ,  G06F13/16 ,  G06F13/40

Abstract: Described herein are various embodiments of reducing dynamic power consumption within a processor device. One embodiment provides a technique for dynamic link width reduction based on the instantaneous throughput demand for client of an interconnect fabric. One embodiment provides for a parallel processor comprising an interconnect fabric including a dynamic bus module to configure a bus width for a client of the interconnect fabric based on throughput demand from the client.

公开(公告)号：US20180300930A1

公开(公告)日：2018-10-18

申请号：US15488824

申请日：2017-04-17

Applicant: Intel Corporation

Inventor： Jonathan Kennedy ,  Gabor Liktor ,  Jeffery S. Boles ,  Slawomir Grajewski ,  Balaji Vembu ,  Travis T. Schluessler ,  Abhishek R. Appu ,  Ankur N. Shah ,  Joydeep Ray ,  Altug Koker ,  Jacek Kwiatkowski

IPC: G06T15/00 ,  A63F13/53

CPC classification number: G06T15/005 ,  A63F13/53 ,  A63F2300/303 ,  A63F2300/66

Abstract: Systems, apparatuses, and methods may provide for technology to process graphics data in a virtual gaming environment. The technology may identify, from graphics data in a graphics application, redundant graphics calculations relating to common frame characteristics of one or more graphical scenes to be shared between client game devices of a plurality of users and calculate, in response to the identified redundant graphics calculations, frame characteristics relating to the one or more graphical scenes. Additionally, the technology may send, over a computer network, the calculation of the frame characteristics to the client game devices.

公开(公告)号：US20180300903A1

公开(公告)日：2018-10-18

申请号：US15489068

申请日：2017-04-17

Applicant: Intel Corporation

Inventor： John G. Gierach ,  Hugues Labbe ,  Tomer Bar-On ,  Adam T. Lake ,  Kai Xiao ,  Ankur N. Shah ,  Philip R. Laws ,  Devan Burke ,  Abhishek R. Appu ,  Peter L. Doyle ,  Elmoustapha Ould-Ahmed-Vall ,  Travis T. Schluessler ,  Altug Koker

IPC: G06T9/00 ,  G06T1/20 ,  G06T7/194 ,  G09G3/00 ,  G06T15/20 ,  G06T15/50 ,  G06T1/60

Abstract: Systems, apparatuses, and methods may provide for technology to render and compress stereoscopic graphical data. In one example, the technology identifies, from graphical data associated with a stereoscopic image defined by a first perspective view and a second perspective view, a background region and a foreground region of a graphical scene in the stereoscopic image, renders graphical data of the identified background region for the first perspective view, and compresses the rendered graphical data.

公开(公告)号：US20180300841A1

公开(公告)日：2018-10-18

申请号：US15488842

申请日：2017-04-17

Applicant: Intel Corporation

Inventor： Travis T. Schluessler ,  Abhishek R. Appu ,  Ankur N. Shah ,  Joydeep Ray ,  Altug Koker ,  Jacek Kwiatkowski ,  Ingo Wald ,  Jefferson Amstutz ,  Johannes Guenther ,  Gabor Liktor ,  Elmoustapha Ould-Ahmed-Vall

IPC: G06T1/20 ,  G09G5/36

Abstract: Systems, apparatuses, and methods may provide for technology to process graphical data, and to modify a runtime environment in a parallel computing platform for a graphic environment.

公开(公告)号：US20180300145A1

公开(公告)日：2018-10-18

申请号：US15488988

申请日：2017-04-17

Applicant: Intel Corporation

Inventor： Andrew T. Lauritzen ,  Gabor Liktor ,  Tomer Bar-On ,  Hugues Labbe ,  John G. Gierach ,  Joydeep Ray ,  Travis T. Schluessler ,  John H. Feit ,  Nikos Kaburlasos ,  Jacek Kwiatkowski ,  Abhishek R. Appu ,  Balaji Vembu ,  Altug Koker

IPC: G06F9/38 ,  G06F9/30 ,  G06F12/0875 ,  G06F12/0862

CPC classification number: G06F12/0862 ,  G06F9/30145 ,  G06F9/3802 ,  G06F9/3851 ,  G06F9/3887 ,  G06F12/0811 ,  G06F12/0855 ,  G06F12/0875 ,  G06F2212/1016 ,  G06F2212/452 ,  G06F2212/455 ,  G06F2212/602 ,  G06F2212/6024 ,  G06T1/20

Abstract: Systems, apparatuses and methods may provide a way to track graphics pipeline operations. More particularly, the systems, apparatuses and methods may provide a way to track operation dependencies between graphics pipeline operations for blocks of pixel samples and stall one or more of the pipeline operations based on the operation dependencies. The systems, apparatuses and methods may further provide cache pre-fetch hardware to monitor processing of blocks of pixel samples and fetch a next block of the pixel samples from the memory into a cache before completion of processing a current block of pixel samples based on one or more of the pipeline operations or a surface state of one or more regions of a screen space.