公开(公告)号：US11682106B2

公开(公告)日：2023-06-20

申请号：US17201973

申请日：2021-03-15

Applicant: Intel Corporation

Inventor： Aaron Steyskal ,  Nausheen Ansari ,  Nobuyuki Suzuki ,  Zhiming Zhuang ,  Atsuo Kuwahara ,  Gary K. Smith

IPC: G06T15/00 ,  G06T3/40 ,  G06T11/60 ,  G06T1/20 ,  G06T1/60 ,  G06T3/00 ,  H04L67/131 ,  G06F3/01

CPC classification number: G06T3/4038 ,  G06T1/20 ,  G06T1/60 ,  G06T3/0012 ,  G06T11/60 ,  H04L67/131 ,  G06F3/013

Abstract: Examples disclosed herein obtain first image data and the second image data for a foveated image frame to be displayed on a display, the first image data to have a first resolution and the second image data to have a second resolution lower than the first resolution. Disclosed examples also up-sample the second image data based on first metadata to generate up-sampled second image data, the up-sampled second image data to have the first resolution, and combine the first image data and the up-sampled second image data based on second metadata. Disclosed examples further perform, based on third metadata, a combination of at least two different filter operations on an overlap region including a portion of the first image data and a portion of the up-sampled second image data to generate the foveated image frame, the third metadata to specify a width in pixels of the overlap region.

公开(公告)号：US11562674B2

公开(公告)日：2023-01-24

申请号：US17133275

申请日：2020-12-23

Applicant: Intel Corporation

Inventor： Nausheen Ansari ,  Seh Kwa ,  Paul S. Diefenbaugh ,  Robert Johnston

IPC: G09G3/20

Abstract: Technology for a display source device is described. The display source device can receive a frame start indication from a display panel at a start of a frame. The display source device can align a timing of the display source device to a timing of the display panel based on the frame start indication received from the display panel to obtain frame-level synchronization between the display source device and the display panel. The display source device can send one or more frame update regions to the display panel in accordance with the timing of the display source device that is aligned to the timing of the display panel.

公开(公告)号：US20220070522A1

公开(公告)日：2022-03-03

申请号：US17523502

申请日：2021-11-10

Applicant: Intel Corporation

Inventor： Lakshminarayana Pappu ,  Nausheen Ansari ,  Howard Heck ,  Amit Kumar Srivastava

IPC: H04N21/43 ,  H04N21/422 ,  G06F13/38

Abstract: Embodiments relate to a controller subsystem that includes a virtual reality (VR) subsystem to: identify data received from a peripheral device as related to an audio/visual (A/V) function of the peripheral device; direct, based on the identification that the data is related to the A/V function of the peripheral device, the data to be stored in a memory subsystem of the controller subsystem; and facilitate transmission of an indication of a storage location of the data in the memory subsystem to a host system that is communicatively coupled with the controller subsystem. The controller subsystem further includes a graphics engine to: identify, in a message received from the host system based on the transmission of the indication of the storage location of the data, instructions related to rendering the data; and generate, based on the data received from the peripheral device, rendered data. Other embodiments may be described and claimed.

公开(公告)号：US11263165B2

公开(公告)日：2022-03-01

申请号：US15396573

申请日：2016-12-31

Applicant: INTEL CORPORATION

Inventor： Karthi R. Vadivelu ,  Abdul R. Ismail ,  Nausheen Ansari

IPC: G06F13/42 ,  G06F13/40

Abstract: Apparatuses relating to periodic Universal Serial Bus (USB) transaction scheduling at fractional bus intervals are described. In one embodiment, an apparatus includes a receptacle to receive a plug of a first device and a second device; a transceiver circuit coupled to the receptacle; and a controller circuit to: switch between a first mode for a first class of data transfers and a second mode for a second class of data transfers, wherein the first class preempts the second class of data transfers, schedule a data transfer with the transceiver circuit for a first endpoint of the first device at a first service interval of a bus interval when in the first mode, and schedule a data transfer with the transceiver circuit for a second, different endpoint of the second device at a second service interval that is smaller than the first service interval when in the first mode.

公开(公告)号：US20210398507A1

公开(公告)日：2021-12-23

申请号：US17233633

申请日：2021-04-19

Applicant: Intel Corporation

Inventor： Richmond Hicks ,  Arthur J. Runyan ,  Nausheen Ansari ,  Narayan Biswal

IPC: G09G5/22 ,  G09G5/377 ,  G06F3/01

Abstract: A system for reducing bandwidth and/or reducing power consumed by a display may comprise a display having a background plane and a region of interest plane that may be identified by a gaze tracker. The region of interest may be of a higher quality picture. In some embodiments, the display may be a large panel display and in others a head mounted display (HMD).

公开(公告)号：US11103777B2

公开(公告)日：2021-08-31

申请号：US16732800

申请日：2020-01-02

Applicant: Intel Corporation

Inventor： Richmond Hicks ,  Kunjal Parikh ,  Nausheen Ansari ,  Arthur J. Runyan ,  Narayan Biswal

IPC: A63F13/25 ,  G09G3/32 ,  G09G3/3208 ,  G09G5/12 ,  G09G3/36 ,  G09G5/395 ,  G09G3/20 ,  G09G5/36 ,  G06F3/14

Abstract: In one embodiment, an apparatus having an integrated circuit made of substrate, at least three light emitters arranged on the substrate, and driver circuitry located on the integrated circuit, the driver circuitry to drive an ultra low persistence display to remove ghosting and nausea.

公开(公告)号：US11062674B2

公开(公告)日：2021-07-13

申请号：US16457723

申请日：2019-06-28

Applicant: Intel Corporation

Inventor： Nausheen Ansari ,  Gary Smith

IPC: G09G5/00

Abstract: The present disclosure is directed to systems and methods of maintaining source device to sink device synchronization in systems in which the source device enters a Panel Self-Refresh (PSR/PSR2) mode and the sink device enables adaptive synchronization with the source device. To maintain synchronization, in some instances the source device and the sink device may maintain synchronization contemporaneous with at least a portion of the PSR/PSR2 operating mode. To maintain synchronization, in some instances, a high-bandwidth communications link may be maintained between the source device and the sink device. In some instances, synchronization between the source device and the sink device may be interrupted upon the source device entering the PSR/PSR2 operating mode and may be re-established upon the source device exiting the PSR/PSR2 operating mode.

公开(公告)号：US11044045B2

公开(公告)日：2021-06-22

申请号：US16524613

申请日：2019-07-29

Applicant: INTEL CORPORATION

Inventor： Nausheen Ansari ,  Ziv Kabiry ,  Gal Yedidia

IPC: H04L1/00 ,  H03M5/14 ,  H03M13/15 ,  H03M13/29 ,  H03M13/31

Abstract: Disclosed herein are techniques to provide forward error correction for a high-speed interconnect symbol stream, such as, DisplayPort. The symbol stream may be split into FEC blocks and parity bits generated for each of the FEC blocks. The parity bits may be interleaved, encoded, and transmitted over an interconnect along with the symbol stream to provide forward error correction for the symbol stream.

公开(公告)号：US20200349905A1

公开(公告)日：2020-11-05

申请号：US16398608

申请日：2019-04-30

Applicant: Intel Corporation

Inventor： Richmond Hicks ,  Nausheen Ansari ,  Arthur J. Runyan ,  Narayan Biswal

IPC: G09G5/18 ,  G09G5/00 ,  G09G5/39 ,  H04N7/01 ,  G06F3/01 ,  G06K9/00

Abstract: Systems, methods and computer readable mediums for displaying pixels asynchronously on a display, for block-based camera updates, and for event driven frame updates on an asynchronous display. The first method includes determining, by a computing device, changes in a new frame to be rendered on an asynchronous display. The changes comprise pixels of a currently displayed image on the asynchronous display that have changed in the new frame. The changes represent updated pixels. The updated pixels along with corresponding pixel addresses representing the locations of the updated pixels are sent to the asynchronous display to update the currently displayed image with the updated pixels based on the pixel addresses. The second method includes a camera capturing an image n. The camera determines what regions of image n changed from the previous image n−1. The changed regions are merged with the previous image n−1 to obtain a new image n. The new image n is displayed. The third method includes waiting for an event or a timeout to occur, the event or timeout caused by one or more input devices to a computing system. When an event or timeout is received, a weight associated with the event or timeout is added to a score. A pre-defined limit is checked to determine if it has been exceeded by the score. If the pre-defined limit has been exceeded, then a frame is updated, the updated frame is displayed asynchronously, and the score is cleared. The process then repeats by waiting for another event or timeout. If the pre-defined limit has not been exceeded, then the process returns to waiting for an event or a timeout.

公开(公告)号：US10665210B2

公开(公告)日：2020-05-26

申请号：US15858025

申请日：2017-12-29

Applicant: INTEL CORPORATION

Inventor： Seh Kwa ,  Nausheen Ansari

IPC: G09G5/393 ,  G09G5/00 ,  G09G5/36 ,  G09G5/395 ,  G06F3/14

Abstract: Disclosed herein are techniques to provide notification of the type and/or attributes of frame updates. A platform can notify a panel of further frame updates, whether the frame update is a full frame update or a partial frame update and attributes of the frame update. The platform can notify the panel of information about the frame update during a vertical blanking interval by asserting a command or signaling the panel using selected symbols during the vertical blanking interval.