公开(公告)号：US20170242503A1

公开(公告)日：2017-08-24

申请号：US15437304

申请日：2017-02-20

Applicant: Intevac, Inc.

Inventor： Babak Adibi ,  Terry Bluck

IPC: G06F3/041 ,  H01L21/265

CPC classification number: G06F3/041 ,  C03C17/3417 ,  C03C17/3435 ,  C03C17/3441 ,  C03C17/42 ,  C03C23/0055 ,  C03C2217/734 ,  C03C2217/76 ,  C03C2217/78 ,  G06F2203/04103 ,  H01L21/265 ,  Y02P40/57

Abstract: Mechanical properties of a cover glass for a touch screen are improved by ion implanting the front surface. The implant process uses non-mass analyzed ions that physically embed in voids between inter-connected molecules of the glass. The embedded ions create compression stress on the molecular structure, thus enhancing the mechanical properties of the glass to avoid scratches. Also, implanting ions containing fluoride enhances the hydrophobic and oleophobis properties of the glass to prevent finger prints.

公开(公告)号：US20150072461A1

公开(公告)日：2015-03-12

申请号：US14510109

申请日：2014-10-08

Applicant: Intevac, Inc.

Inventor： Babak Adibi ,  Moon Chun

IPC: H01L31/18 ,  H01J37/18 ,  H01J37/317

CPC classification number: H01L31/1876 ,  C23C14/042 ,  C23C14/48 ,  H01J37/185 ,  H01J37/3171 ,  H01J37/32412 ,  H01J37/32422 ,  H01J2237/0437 ,  H01J2237/184 ,  H01J2237/201 ,  H01J2237/327 ,  H01J2237/3365 ,  H01L21/2236 ,  H01L31/068 ,  H01L31/0682 ,  H01L31/1804 ,  H01L31/1864 ,  Y02E10/547 ,  Y02P70/521

Abstract: An ion implantation system having a grid assembly. The system includes a plasma source configured to provide plasma in a plasma region; a first grid plate having a plurality of apertures configured to allow ions from the plasma region to pass therethrough, wherein the first grid plate is configured to be biased by a power supply; a second grid plate having a plurality of apertures configured to allow the ions to pass therethrough subsequent to the ions passing through the first grid plate, wherein the second grid plate is configured to be biased by a power supply; and a substrate holder configured to support a substrate in a position where the substrate is implanted with the ions subsequent to the ions passing through the second grid plate.

Abstract translation: 具有栅格组件的离子注入系统。 该系统包括构造成在等离子体区域中提供等离子体的等离子体源; 第一格栅板，其具有多个孔，其被配置为允许来自等离子体区域的离子通过，其中所述第一格栅板被配置为被电源偏置; 第二格栅板，其具有多个孔，其构造成允许离子穿过第一栅格板之后的离子通过，其中第二栅格板被配置为被电源偏置; 以及衬底保持器，其被配置为在所述离子通过所述第二栅格板之后将所述衬底支撑在所述衬底被注入的位置处的所述离子。

公开(公告)号：US20140170795A1

公开(公告)日：2014-06-19

申请号：US14135519

申请日：2013-12-19

Applicant: Intevac, Inc.

Inventor： Vinay Prabhakar ,  Babak Adibi

IPC: H01L31/18

CPC classification number: H01L31/0516 ,  H01J37/32412 ,  H01J37/32422 ,  H01J37/32623 ,  H01J2237/20 ,  H01J2237/3365 ,  H01L21/266 ,  H01L21/426 ,  H01L31/0682 ,  H01L31/1804 ,  H01L31/188 ,  Y02E10/50 ,  Y02E10/547 ,  Y02P70/521

Abstract: A grid for minimizing effects of ion divergence in plasma ion implant. The plasma grid is made of a flat plate having a plurality of holes, wherein the holes are arranged in a plurality of rows and a plurality of columns thereby forming beamlets of ions that diverge in one direction. A mask is used to form the implanted shapes on the wafer, wherein the holes in the mask are oriented orthogonally to the direction of beamlet divergence.

Abstract translation: 用于最小化离子发散在等离子体离子注入中的网格。 等离子体格栅由具有多个孔的平板制成，其中孔布置成多行和多个列，从而形成沿一个方向发散的离子束。 掩模用于在晶片上形成植入的形状，其中掩模中的孔与子束发散的方向垂直。

公开(公告)号：US20130115764A1

公开(公告)日：2013-05-09

申请号：US13672652

申请日：2012-11-08

Applicant: Intevac, Inc.

Inventor： Terry Pederson ,  Henry Hieslmair ,  Moon Chun ,  Vinay Prabhakar ,  Babak Adibi ,  Terry Bluck

IPC: H01L21/677 ,  H01L21/265

CPC classification number: H01L21/6833 ,  H01L21/26506 ,  H01L21/67745 ,  H01L21/6776 ,  H01L21/681 ,  H01L21/6831 ,  H01L31/1876 ,  H02N13/00 ,  Y02E10/50 ,  Y02P70/521

Abstract: A system for processing substrates has a vacuum enclosure and a processing chamber situated to process wafers in a processing zone inside the vacuum enclosure. Two rail assemblies are provided, one on each side of the processing zone. Two chuck arrays ride, each on one of the rail assemblies, such that each is cantilevered on one rail assemblies and support a plurality of chucks. The rail assemblies are coupled to an elevation mechanism that places the rails in upper position for processing and at lower position for returning the chuck assemblies for loading new wafers. A pickup head assembly loads wafers from a conveyor onto the chuck assemblies. The pickup head has plurality of electrostatic chucks that pick up the wafers from the front side of the wafers. Cooling channels in the processing chucks are used to create air cushion to assist in aligning the wafers when delivered by the pickup head.

Abstract translation: 用于处理衬底的系统具有真空外壳和位于处理真空外壳内的处理区中的晶片的处理室。 提供两个轨道组件，一个在处理区域的每一侧。 两个卡盘阵列，每个在一个导轨组件上，使得每个卡盘阵列悬挂在一个导轨组件上并支撑多个卡盘。 轨道组件联接到升降机构，其将轨道放置在用于处理的上部位置，并且在较低位置处返回用于装载新晶片的卡盘组件。 拾取头组件将晶片从传送器装载到卡盘组件上。 拾取头具有从晶片的前侧拾取晶片的多个静电卡盘。 处理卡盘中的冷却通道用于产生气垫，以在由拾取头传送时帮助对准晶片。

公开(公告)号：US10559710B2

公开(公告)日：2020-02-11

申请号：US16040423

申请日：2018-07-19

Applicant: Intevac, Inc.

Inventor： William Eugene Runstadler, Jr. ,  Babak Adibi ,  Terry Bluck

IPC: H01J37/20 ,  H01J37/18 ,  H01J37/317 ,  H01L31/18

Abstract: A system for transporting substrates and precisely alignment the substrates to shadow masks. The system decouples the functions of transporting the substrates, vertically aligning the substrates, and horizontally aligning the substrates. The transport system includes a carriage upon which plurality of pedestals are loosely positioned, each of the pedestals includes a base having vertical alignment wheels to place the substrate in precise vertical alignment. Two sidebars are configured to freely slide on the base. Each of the sidebars includes a set of horizontal alignment wheels that precisely align the substrate in the horizontal direction. Substrate support claws are attached to the sidebars in precise alignment to the vertical alignment wheels and the horizontal alignment wheels.

公开(公告)号：US20160332908A1

公开(公告)日：2016-11-17

申请号：US15152488

申请日：2016-05-11

Applicant: Intevac, Inc.

Inventor： Terry Bluck ,  Babak Adibi

IPC: C03C17/34 ,  C03C17/42

CPC classification number: C03C17/3435 ,  C03C2204/08

Abstract: A glass cover for electronic devices, the glass cover having a first coating formed directly over and in contact with the front surface of the glass (where front means the surface facing the user), the first coating is textured, and a second coating is provided over the first coating, the second coating being resistance to scratching, e.g., a DLC coating. The first coating may be made of, e.g., silicon-oxide, silicon-nitride, or silicon oxy-nitride.

Abstract translation: 一种用于电子设备的玻璃盖，玻璃盖具有直接形成在玻璃的前表面上并与玻璃的前表面接触的第一涂层（其中前表面是面向使用者的表面），第一涂层被纹理化，并且提供第二涂层 在第一涂层上，第二涂层耐划伤，例如DLC涂层。 第一涂层可以由例如氧化硅，氮化硅或氮氧化硅制成。

公开(公告)号：US20160233122A1

公开(公告)日：2016-08-11

申请号：US15099523

申请日：2016-04-14

Applicant: Intevac, Inc.

Inventor： Terry Pederson ,  Henry Hieslmair ,  Moon Chun ,  Vinay Prabhakar ,  Babak Adibi ,  Terry Bluck

IPC: H01L21/683 ,  H02N13/00

CPC classification number: H01L21/6833 ,  H01L21/26506 ,  H01L21/67745 ,  H01L21/6776 ,  H01L21/681 ,  H01L21/6831 ,  H01L31/1876 ,  H02N13/00 ,  Y02E10/50 ,  Y02P70/521

Abstract: A system for processing substrates has a vacuum enclosure and a processing chamber situated to process wafers in a processing zone inside the vacuum enclosure. Two rail assemblies are provided, one on each side of the processing zone. Two chuck arrays ride, each on one of the rail assemblies, such that each is cantilevered on one rail assemblies and support a plurality of chucks. The rail assemblies are coupled to an elevation mechanism that places the rails in upper position for processing and at lower position for returning the chuck assemblies for loading new wafers. A pickup head assembly loads wafers from a conveyor onto the chuck assemblies. The pickup head has plurality of electrostatic chucks that pick up the wafers from the front side of the wafers. Cooling channels in the processing chucks are used to create air cushion to assist in aligning the wafers when delivered by the pickup head.

公开(公告)号：US09324598B2

公开(公告)日：2016-04-26

申请号：US13672652

申请日：2012-11-08

Applicant: INTEVAC, INC.

Inventor： Terry Pederson ,  Henry Hieslmair ,  Moon Chun ,  Vinay Prabhakar ,  Babak Adibi ,  Terry Bluck

IPC: H01L21/677 ,  H01L21/265 ,  H01L21/68 ,  H01L31/18 ,  H01L21/683

CPC classification number: H01L21/6833 ,  H01L21/26506 ,  H01L21/67745 ,  H01L21/6776 ,  H01L21/681 ,  H01L21/6831 ,  H01L31/1876 ,  H02N13/00 ,  Y02E10/50 ,  Y02P70/521

Abstract: A system for processing substrates has a vacuum enclosure and a processing chamber situated to process wafers in a processing zone inside the vacuum enclosure. Two rail assemblies are provided, one on each side of the processing zone. Two chuck arrays ride, each on one of the rail assemblies, such that each is cantilevered on one rail assemblies and support a plurality of chucks. The rail assemblies are coupled to an elevation mechanism that places the rails in upper position for processing and at lower position for returning the chuck assemblies for loading new wafers. A pickup head assembly loads wafers from a conveyor onto the chuck assemblies. The pickup head has plurality of electrostatic chucks that pick up the wafers from the front side of the wafers. Cooling channels in the processing chucks are used to create air cushion to assist in aligning the wafers when delivered by the pickup head.

Abstract translation: 用于处理衬底的系统具有真空外壳和位于处理真空外壳内的处理区中的晶片的处理室。 提供两个轨道组件，一个在处理区域的每一侧。 两个卡盘阵列，每个在一个导轨组件上，使得每个卡盘阵列悬挂在一个导轨组件上并支撑多个卡盘。 轨道组件联接到升降机构，其将轨道放置在用于处理的上部位置，并且在较低位置处返回用于装载新晶片的卡盘组件。 拾取头组件将晶片从传送器装载到卡盘组件上。 拾取头具有从晶片的前侧拾取晶片的多个静电卡盘。 处理卡盘中的冷却通道用于产生气垫，以在由拾取头传送时帮助对准晶片。

公开(公告)号：US09318332B2

公开(公告)日：2016-04-19

申请号：US14135519

申请日：2013-12-19

Applicant: Intevac, Inc.

Inventor： Vinay Prabhakar ,  Babak Adibi

IPC: H01L21/425 ,  C23C16/00 ,  H01L21/266 ,  H01L31/068 ,  H01L31/18 ,  H01L21/426 ,  H01J37/32

CPC classification number: H01L31/0516 ,  H01J37/32412 ,  H01J37/32422 ,  H01J37/32623 ,  H01J2237/20 ,  H01J2237/3365 ,  H01L21/266 ,  H01L21/426 ,  H01L31/0682 ,  H01L31/1804 ,  H01L31/188 ,  Y02E10/50 ,  Y02E10/547 ,  Y02P70/521

Abstract: A grid for minimizing effects of ion divergence in plasma ion implant. The plasma grid is made of a flat plate having a plurality of holes, wherein the holes are arranged in a plurality of rows and a plurality of columns thereby forming beamlets of ions that diverge in one direction. A mask is used to form the implanted shapes on the wafer, wherein the holes in the mask are oriented orthogonally to the direction of beamlet divergence.

Abstract translation: 用于最小化离子发散在等离子体离子注入中的网格。 等离子体格栅由具有多个孔的平板制成，其中孔布置成多行和多个列，从而形成沿一个方向发散的离子束。 掩模用于在晶片上形成植入的形状，其中掩模中的孔与子束发散的方向垂直。

公开(公告)号：US20140166087A1

公开(公告)日：2014-06-19

申请号：US13719145

申请日：2012-12-18

Applicant: INTEVAC, INC.

Inventor： Henry Hieslmair ,  Babak Adibi

IPC: H01L31/0352 ,  H01L31/18

CPC classification number: H01L31/03529 ,  H01L31/022433 ,  H01L31/068 ,  H01L31/0682 ,  H01L31/1804 ,  H01L31/1864 ,  Y02E10/547 ,  Y02P70/521

Abstract: A photovoltaic cell having a graded doped region such as a graded emitter and methods of making photovoltaic cells having graded doped regions such as a graded emitter are disclosed. Doping is adjusted across a surface to minimize resistive (I2R) power losses. The graded emitters provide a gradual change in sheet resistance over the entire distance between the lines. The graded emitter profile may have a lower sheet resistance near the metal lines and a higher sheet resistance farther from the metal line edges. The sheet resistance is graded such that the sheet resistance is lower where I2R power losses are highest due to current crowding. One advantage of graded emitters over selective emitters is improved efficiency. An additional advantage of graded emitters over selective emitters is improved ease of aligning metallization to the low sheet resistance regions.

Abstract translation: 公开了一种具有渐变掺杂区域（诸如渐变发射极）的光伏电池和制造具有渐变掺杂区域（诸如渐变发射极）的光伏电池的方法。 在表面上调整掺杂以最小化电阻（I2R）功率损耗。 分级发射器在线之间的整个距离上提供薄层电阻的逐渐变化。 渐变的发射极轮廓可以在金属线附近具有较低的薄层电阻，并且具有比金属线边缘更远的更高的薄层电阻。 薄片电阻被分级，使得由于电流拥挤，I2R功率损耗最高的薄层电阻较低。 分级发射器超过选择性发射器的一个优点是提高了效率。 渐变发射体超过选择性发射体的另外的优点是改善了将金属化对准低电阻区域的容易性。