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公开(公告)号:JPH0526420B2
公开(公告)日:1993-04-16
申请号:JP20207287
申请日:1987-08-13
Applicant: MATSUSHITA ELECTRIC WORKS LTD
Inventor: SAKAMOTO SHINJI , KATO KAORU , ARAKAWA MASAO
IPC: H02J7/10
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公开(公告)号:JPH0329156B2
公开(公告)日:1991-04-23
申请号:JP441585
申请日:1985-01-14
Applicant: MATSUSHITA ELECTRIC WORKS LTD
Inventor: ARAKAWA MASAO , KYOZUMI KATSUYUKI
IPC: H05B41/16 , G03B27/54 , G03G15/04 , G03G15/043 , H05B41/24
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公开(公告)号:JPH028917A
公开(公告)日:1990-01-12
申请号:JP16017488
申请日:1988-06-27
Applicant: MATSUSHITA ELECTRIC WORKS LTD
Inventor: TERASAWA TOMIZO , OGAWA MASANOBU , KAMI HIRONORI , ARAKAWA MASAO
IPC: G05F1/56
Abstract: PURPOSE:To obtain a sufficient withstand voltage even when an input voltage is a high voltage by connecting the series circuit of a DMOS transistor (TR) and NPN transistor on the same integrated circuit between the input and output terminals of a constant-voltage circuit. CONSTITUTION:When an input voltage VIN is applied across an input terminal 1 and input-output common terminal 3, a Zener voltage VZD is produced across the cathode of a Zener diode ZD through a resistance R1. The voltage VZD is divided by resistances R2 and R3 and a voltage of VZD.R3/R2+R3 is produced across the base of a transistor (TR) Q1. Another voltage of VZD.R3/R2+R3-VBE is produced across an output terminal 2. Therefore, when the threshold voltage VTH of the MOS TR Q1 is designed to derive VZD-VTH>VZD.R3/R2+R3-VBE, an NPN TR Q2 always operate in an unsaturated area. Moreover, if the voltage VZD is brought nearer to an output voltage VOUT when the difference between the input voltage VIN and output voltage VOUT is large, most of the difference between the input and output voltages is applied across the drain D and source S of the TR Q1. As a result, the TR Q2 can be made to withstand a high voltage.
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公开(公告)号:JPH01288011A
公开(公告)日:1989-11-20
申请号:JP11750188
申请日:1988-05-14
Applicant: MATSUSHITA ELECTRIC WORKS LTD
Inventor: KITADOU MASAHARU , ARAKAWA MASAO
IPC: H03K17/73 , H03K17/56 , H03K17/567
Abstract: PURPOSE:To prevent an electrostatic induction thyristor from being turned on due to malfunction caused by noise or the like by switching the electrostatic induction thyristor in response to the switching of a field effect transistor(TR). CONSTITUTION:When a control signal (a) is outputted from a control circuit 2, a MOSFETQ2 is turned on and then an SI thyristor Q1 is turned on. Then a gate voltage (b) of the SI thyristor Q1 goes to an L level and an anode circuit Ic flows. when the control signal goes to an L level, the MOSFETQ2 is turned off and the SI thyristor Q1 is turned off. Since a bias is given to the gate of the SI thyristor Q1 via a resistor R1 at all times, no malfunction due to noise takes place. The gate of the MOSFETQ2 is controlled to attain sure switching without malfunction.
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公开(公告)号:JPS6446482A
公开(公告)日:1989-02-20
申请号:JP20207487
申请日:1987-08-13
Applicant: MATSUSHITA ELECTRIC WORKS LTD
Inventor: SAKAMOTO SHINJI , KATO KAORU , ARAKAWA MASAO
Abstract: PURPOSE:To reduce the number of parts as well as to set the charge current with due consideration of the temperature properties of a secondary battery taken into account, by using a clock circuit and a timer circuit in common both at a charge circuit side and at a magnetic field generation circuit side. CONSTITUTION:A charging part 1 has a power 7 for charging. A main body 2 comprises a charge circuit 5 for charging a secondary battery 6 for a preset time period to operate in conjunction with a clock circuit 3 and a timer circuit 4, and a magnetic field generation circuit 9 for intermittently generating a high frequency magnetic field with the same clock circuit 3 and timer circuit 4. Namely, the clock circuit 3 and the timer circuit 4 are used in common. The timer circuit 4 is alternatively connected to either the charge circuit 5 or the magnetic field generation circuit 9 by a trigger output from a detection circuit 8. The number of parts required can thus be reduced to save the cost. Moreover, the charge current can be set with due consideration of the temperature properties of the secondary battery 6 taken into account for preventing the deterioration of the incomplete charging of the secondary battery 6.
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公开(公告)号:JPS63292016A
公开(公告)日:1988-11-29
申请号:JP12910687
申请日:1987-05-26
Applicant: MATSUSHITA ELECTRIC WORKS LTD
Inventor: SAKAMOTO SHINJI , ARAKAWA MASAO
Abstract: PURPOSE:To simplify a construction and to improve the precision of an arithmetic operation, by a method wherein the sum of a pair of output currents of an optical position sensor (PSD) or one output current thereof is inputted alternatively to one preliminary circuit element by a switching element. CONSTITUTION:First a preset switch (SW) 8a is set so that the sum I1+I2 of two output currents of PSD 1 is inputted to a preliminary circuit element 2. On the occasion, a preset switch (SW) 8b in linkage to SW 8a is so set as to input an output of an A/D conversion element 4 to a memory element 5. Accordingly, a value corresponding to the quantity of a received light reflected from an object of detection is written as a reference value in the memory element 5. Next, SW 8a is switched so that only the output current I1 of PSD 1 is inputted to the circuit element 2. At this time, the gain of the circuit element 2 takes an optimum value, since an impedance variable element 6 is adjusted to have an optimum value corresponding to the quantity of received light, on the basis of the reference value. Besides, SW 8b is switched and an output of the conversion element 4 is inputted to an arithmetic circuit element 3. Thus, a distance to the object of detection can be determined by a prescribed calculation formula together with the reference value.
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公开(公告)号:JPS63183075A
公开(公告)日:1988-07-28
申请号:JP1689587
申请日:1987-01-27
Applicant: MATSUSHITA ELECTRIC WORKS LTD
Inventor: SAKAMOTO SHINJI , YABUTA AKIRA , KATO KAORU , ARAKAWA MASAO
IPC: A61N2/00
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公开(公告)号:JPS62172812A
公开(公告)日:1987-07-29
申请号:JP1451586
申请日:1986-01-25
Applicant: MATSUSHITA ELECTRIC WORKS LTD
Inventor: ARAKAWA MASAO , TERASAWA TOMIZO
IPC: H03K17/04 , H03K17/687 , H03K17/78
Abstract: PURPOSE:To realize a semiconductor relay circuit which can execute switching at a high speed, by a simple circuit constitution using an insulation gate planar thyristor, by providing a control circuit for executing quickly charge and discharge of a control voltage of a switching element. CONSTITUTION:A MOSFET 9a of an enhancement type is used as a switching element. When a resistance value of a resistance 8 is set in advance so that a voltage V1 across the resistance 8 exceeds a threshold voltage VTH1 of an N channel MOSFET in an insulation gate planar thyristor IGT 6, when the voltage V1 has exceeded the voltage VTH1, an FET in the IGT 6 becomes a conducting state, and a positive charge which has been accumulated in a gate of the FET 9a flows from an anode terminal of the IGT 6 to a cathode terminal. The flow of this charge becomes a trigger current and causes a thyristor phenomenon of the IGT 6, and discharge quickly the positive charge which has been accumulated between a gate and a source of the FET 9a.
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公开(公告)号:JPS6142603B2
公开(公告)日:1986-09-22
申请号:JP5921980
申请日:1980-04-30
Applicant: MATSUSHITA ELECTRIC WORKS LTD
Inventor: ARAKAWA MASAO , YOSHIDA YUKIO
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公开(公告)号:JPS61163596A
公开(公告)日:1986-07-24
申请号:JP441585
申请日:1985-01-14
Applicant: MATSUSHITA ELECTRIC WORKS LTD
Inventor: ARAKAWA MASAO , KIYOZUMI KATSUYUKI
IPC: H05B41/16 , G03B27/54 , G03G15/04 , G03G15/043 , H05B41/24
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