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    ANALOG TO DIGITAL CONVERTER FOR ASYNCHRONOUS DETECTOR
    21.
    发明专利
    ANALOG TO DIGITAL CONVERTER FOR ASYNCHRONOUS DETECTOR 未知

    公开(公告)号：CA1074017A

    公开(公告)日：1980-03-18

    申请号：CA251621

    申请日：1976-05-03

    Applicant: MOTOROLA INC

    Inventor： BESEKE KERMIT M ,  JOHANNSEN JAMES R ,  CHAPMAN RONALD H

    IPC: H04L7/04 ,  H04W88/02 ,  H03K5/13 ,  G08C25/00 ,  H03K5/18 ,  H03K13/02

    Abstract: CM-75573 ANALOG TO DIGITAL CONVERTER FOR ASYNCHRONOUS DETECTOR In combination with an asynchronous detector for detecting a particular digital word within a train of signals wherein the detector samples each bit in the train a plurality of times and provides a comparison signal in response to a predetermined number of correlations between the samples and a stored word, an analog to digital converter including signal conditioning means having first and second modes of operations for converting a received analog signal to a digital signal in both modes of operation and inserting periodic error pulses in the digital signal in the first mode of operation and switch means coupled to the signal conditioning means and the detector for switching the signal conditioning means between the first and second modes of operation in response to a comparison signal from the detector. The signal conditioning means includes either a phase locked loop or a digital circuit which counts the time between transitions of the digital signal and inserts error pulses when the time between transitions exceeds a predetermined time.

    CONTINUOUS TONE DECODER/ENCODER
    23.
    发明专利
    CONTINUOUS TONE DECODER/ENCODER 未知

    公开(公告)号：CA1187945A

    公开(公告)日：1985-05-28

    申请号：CA387688

    申请日：1981-10-09

    Applicant: MOTOROLA INC

    Inventor： BENNETT ROBERT M JR ,  CHAPMAN RONALD H

    IPC: H04W88/02 ,  H04B1/10

    Abstract: An improved encoder/decoder circuit which utilizes a phase locked loop frequency synthesizer configuration to permit both encoder and decoder operation. In addition, a sampling filter detector is employed to permit monolithic integration of the circuit and minimize sensitivity to vibration. The sampling filter detector has digitally controlled bandwidth which permits rapid response to reverse burst turn-off. In addition, the circuit includes a pulse adder to implement an energy limited reverse burst turn-off mode.

    24.
    发明专利
    未知

    公开(公告)号：DK14684A

    公开(公告)日：1984-01-13

    申请号：DK14684

    申请日：1984-01-13

    Applicant: MOTOROLA INC

    Inventor： CHAPMAN RONALD H

    IPC: H03C3/09 ,  H03K20060101 ,  H03K7/06 ,  H04L27/12 ,  H03L

    Abstract: Phase-locked loop with DC modulation capability. In a circuit to vary the frequency in an impulse train 10 as a reaction to a change in the average value of a forced digital signal, the signal which is to be changed is taken to an impulse subtracter 12. The forcing of a predetermined number of digital data signals of one sign causes the periodic subtraction of impulses at the subtracter 12 and thus reduces the average frequency at the output from the impulse subtracter 12. The signal at the output from the impulse subtracter is taken to an impulse adder 14 which adds an impulse to the subtracted impulse train as a reaction to a predetermined number of data impulses of the opposite sign. The output impulse train 16 thus varies in frequency as a reaction to the variation in the average value of the digital data input signal. The sequence of addition and subtraction can be reversed.

    SIMULCAST TRANSMISSION SYSTEM HAVING PHASE-LOCKED REMOTE TRANSMITTERS
    26.
    发明专利
    SIMULCAST TRANSMISSION SYSTEM HAVING PHASE-LOCKED REMOTE TRANSMITTERS 未知

    公开(公告)号：CA1113545A

    公开(公告)日：1981-12-01

    申请号：CA323758

    申请日：1979-03-19

    Applicant: MOTOROLA INC

    Inventor： CANNALTE GARY A ,  CHAPMAN RONALD H ,  ROZANSKI WALTER J JR

    IPC: H04B1/04 ,  H04H20/67 ,  H04J3/06 ,  H04L7/033 ,  H04B7/26

    Abstract: SIMULCAST TRANSMISSION SYSTEM HAVING PHASE-LOCKED REMOTE TRANSMITTERS A simulcast transmission system is provided where a reference signal transmitted from a central station is utilized to phase-lock transmitters located at remote stations. The remote stations include a receiver for receiving the transmitted reference signal and a signal conditioner for conditioning the received reference signal for application to the transmitters. The transmitters include a phase-locked loop which may be followed by a multiplier for providing transmitter signals of predetermined frequencies. All the transmitters at the remote stations are phase locked to the reference signal transmitted from the central station. In the event that the reference signal transmitted by the central station is interrupted, the signal conditioner of the remote stations will operate in an open-loop fashion to provide the conditioned reference signal during the interruption. After the interruption has cleared, the signal conditioner is automatically phase synchronized to the reference signal and closed-loop operation is resumed.

    SAMPLED SIGNAL DETECTOR
    27.
    发明专利
    SAMPLED SIGNAL DETECTOR 未知

    公开(公告)号：CA1065417A

    公开(公告)日：1979-10-30

    申请号：CA279815

    申请日：1977-06-03

    Applicant: MOTOROLA INC

    Inventor： CHAPMAN RONALD H

    IPC: H03K5/19 ,  H04B7/26 ,  H04Q1/448 ,  H04Q7/16 ,  H04Q9/08 ,  G06F11/00

    Abstract: SAMPLED SIGNAL DETECTOR A few cycles of an input signal are correlated, or compared, with a few cycles of the input signal received at a previous interval and the interval is varied when correlation, or a positive comparison, has been obtained with the apparatus providing an output or detection signal after a predetermined number of correlations have occurred.

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