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公开(公告)号:EP1873630B1
公开(公告)日:2011-11-02
申请号:EP07111352.6
申请日:1996-08-16
Applicant: MicroUnity Systems Engineering, Inc.
Inventor: Hansen, Craig , Moussouris, John
CPC classification number: G06F9/3802 , G06F9/30 , G06F9/30014 , G06F9/30018 , G06F9/30025 , G06F9/30032 , G06F9/30036 , G06F9/3004 , G06F9/30043 , G06F9/30072 , G06F9/30087 , G06F9/30145 , G06F9/3867 , G06F9/3869 , G06F12/0875 , G06F12/1027 , G06F15/7832 , G06F15/7842 , G06F2212/2515 , H04N21/2365 , H04N21/238 , H04N21/23805 , H04N21/4347 , Y02D10/13
Abstract: A general purpose, programmable media processor (12) for processing and transmitting a media data streams. The media processor (12) incorporates an execution unit (100) that maintains substantially peak data through out of media data streams. The execution unit (100) includes a dynamically partionable multi-precision arithmetic unit (102), programmable switch (104) and programmable extended mathematical element (106). A high bandwidth external interface (124) supplies media data streams at substantially peak rates to a general purpose register file (110) and the execution unit. A memory management unit, and instruction and data cache/buffers (118, 120) are provided. The general purpose, programmable media processor (12) is disposed in a network fabric consisting of fiber optic cable, coaxial cable and twisted pair wires to transmit, process and receive single or unified media data streams.
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公开(公告)号:EP2284709A1
公开(公告)日:2011-02-16
申请号:EP10191073.5
申请日:2004-07-12
Applicant: MicroUnity Systems Engineering, Inc.
Inventor: Hansen, Craig , Moussouris, John , Massalin, Alexia
CPC classification number: G06F9/3001 , G03F1/36 , G06F9/30 , G06F9/30007 , G06F9/30014 , G06F9/30018 , G06F9/30029 , G06F9/30032 , G06F9/30036 , G06F9/3004 , G06F9/30043 , G06F9/30054 , G06F9/30098 , G06F9/30101 , G06F9/30109 , G06F9/30112 , G06F9/30145 , G06F9/30149 , G06F9/3016 , G06F9/30167 , G06F9/35 , G06F9/383 , G06F9/3851 , G06F9/3861 , G06F9/3885 , G06F9/4484 , G06F9/45533 , G06F12/02 , G06F17/5068 , G06F17/5072 , G06F17/5081 , G06F2217/12 , H03M13/158 , H03M13/4169 , Y02D10/13 , Y02D10/26 , Y02D10/28 , Y02P90/265
Abstract: A programmable processor and method for improving the performance of processors by expanding at least two source operands, or a source and a result operand, to a width greater than the width of either the general purpose register or the data path width. The present invention provides operands which are substantially larger than the data path width of the processor by using the contents of a general purpose register to specify a memory address at which a plurality of data path widths of data can be read or written, as well as the size and shape of the operand. In addition, several instructions and apparatus for implementing these instructions are described which obtain performance advantages if the operands are not limited to the width accessible number of general purpose registers.
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公开(公告)号:EP2226725A3
公开(公告)日:2010-11-03
申请号:EP10167233.5
申请日:2004-07-12
Applicant: MicroUnity Systems Engineering, Inc.
Inventor: Hansen, Craig , Massalin, Alexia , Moussouris, John
CPC classification number: G06F9/3001 , G03F1/36 , G06F9/30 , G06F9/30007 , G06F9/30014 , G06F9/30018 , G06F9/30029 , G06F9/30032 , G06F9/30036 , G06F9/3004 , G06F9/30043 , G06F9/30054 , G06F9/30098 , G06F9/30101 , G06F9/30109 , G06F9/30112 , G06F9/30145 , G06F9/30149 , G06F9/3016 , G06F9/30167 , G06F9/35 , G06F9/383 , G06F9/3851 , G06F9/3861 , G06F9/3885 , G06F9/4484 , G06F9/45533 , G06F12/02 , G06F17/5068 , G06F17/5072 , G06F17/5081 , G06F2217/12 , H03M13/158 , H03M13/4169 , Y02D10/13 , Y02D10/26 , Y02D10/28 , Y02P90/265
Abstract: A programmable processor and method for improving the performance of processors by expanding at least two source operands, or a source and a result operand, to a width greater than the width of either the general purpose register or the data path width. The present invention provides operands which are substantially larger than the data path width of the processor by using the contents of a general purpose register to specify a memory address at which a plurality of data path widths of data can be read or written, as well as the size and shape of the operand. In addition, several instructions and apparatus for implementing these instructions are described which obtain performance advantages if the operands are not limited to the width accessible number of general purpose registers.
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公开(公告)号:EP2226726A2
公开(公告)日:2010-09-08
申请号:EP10167237.6
申请日:2004-07-12
Applicant: MicroUnity Systems Engineering, Inc.
Inventor: Hansen, Craig , Moussouris, John , Massalin, Alexia
IPC: G06F12/00
CPC classification number: G06F9/3001 , G03F1/36 , G06F9/30 , G06F9/30007 , G06F9/30014 , G06F9/30018 , G06F9/30029 , G06F9/30032 , G06F9/30036 , G06F9/3004 , G06F9/30043 , G06F9/30054 , G06F9/30098 , G06F9/30101 , G06F9/30109 , G06F9/30112 , G06F9/30145 , G06F9/30149 , G06F9/3016 , G06F9/30167 , G06F9/35 , G06F9/383 , G06F9/3851 , G06F9/3861 , G06F9/3885 , G06F9/4484 , G06F9/45533 , G06F12/02 , G06F17/5068 , G06F17/5072 , G06F17/5081 , G06F2217/12 , H03M13/158 , H03M13/4169 , Y02D10/13 , Y02D10/26 , Y02D10/28 , Y02P90/265
Abstract: A programmable processor and method for improving the performance of processors by expanding at least two source operands, or a source and a result operand, to a width greater than the width of either the general purpose register or the data path width. The present invention provides operands which are substantially larger than the data path width of the processor by using the contents of a general purpose register to specify a memory address at which a plurality of data path widths of data can be read or written, as well as the size and shape of the operand. In addition, several instructions and apparatus for implementing these instructions are described which obtain performance advantages if the operands are not limited to the width accessible number of general purpose registers.
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公开(公告)号:EP1873628A2
公开(公告)日:2008-01-02
申请号:EP07111344.3
申请日:1996-08-16
Applicant: MicroUnity Systems Engineering, Inc.
Inventor: Hansen, Craig , Moussouris, John
CPC classification number: G06F9/3802 , G06F9/30 , G06F9/30014 , G06F9/30018 , G06F9/30025 , G06F9/30032 , G06F9/30036 , G06F9/3004 , G06F9/30043 , G06F9/30072 , G06F9/30087 , G06F9/30145 , G06F9/3867 , G06F9/3869 , G06F12/0875 , G06F12/1027 , G06F15/7832 , G06F15/7842 , G06F2212/2515 , H04N21/2365 , H04N21/238 , H04N21/23805 , H04N21/4347 , Y02D10/13
Abstract: A general purpose, programmable media processor (12) for processing and transmitting a media data streams. The media processor (12) incorporates an execution unit (100) that maintains substantially peak data through out of media data streams. The execution unit (100) includes a dynamically partionable multi-precision arithmetic unit (102), programmable switch (104) and programmable extended mathematical element (lOG). A high bandwidth external interface (124) supplies media data streams at substantially peak rates to a general purpose register file (110) and the execution unit. A memory management unit, and instruction and data cache/buffers (118, 120) are provided. The general purpose, programmable media processor (12) is disposed in a network fabric consisting of fiber optic cable, coaxial cable and twisted pair wires to transmit, process and receive single or unified media data streams.
Abstract translation: 一种用于处理和传输媒体数据流的通用可编程媒体处理器(12)。 媒体处理器(12)包含执行单元(100),该执行单元(100)基本上维持媒体数据流中的峰值数据。 执行单元(100)包括动态可分配多精度算术单元(102),可编程开关(104)和可编程扩展数学元件(10G)。 高带宽外部接口(124)以基本上峰值速率向通用寄存器文件(110)和执行单元提供媒体数据流。 存储器管理单元,以及指令和数据高速缓冲存储器/缓冲器(118,120)。 通用可编程媒体处理器(12)设置在由光纤电缆,同轴电缆和双绞线组成的网络结构中,以发送,处理和接收单个或统一的媒体数据流。
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