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    SYSTEM AND METHOD FOR RESOLVING DRAM PAGE CONFLICTS BASED ON MEMORY ACCESS PATTERNS
    21.
    发明公开
    SYSTEM AND METHOD FOR RESOLVING DRAM PAGE CONFLICTS BASED ON MEMORY ACCESS PATTERNS 审中-公开
    基于记忆模式的系统和方法解决DRAM分页冲突的

    公开(公告)号：EP3092648A1

    公开(公告)日：2016-11-16

    申请号：EP15700945.7

    申请日：2015-01-09

    Applicant: Qualcomm Incorporated

    Inventor： MONDAL, Mriganka ,  LO, Haw-Jing

    IPC: G11C11/4096 ,  G11C7/10

    CPC classification number: G06F3/0611 ,  G06F3/0655 ,  G06F3/0673 ,  G06F12/0607 ,  G06F13/1626 ,  G06F2212/652 ,  G11C7/1042 ,  G11C7/1072 ,  G11C7/1075 ,  G11C11/4096 ,  Y02D10/14

    Abstract: Systems, methods, and computer programs are disclosed for managing access requests to a DRAM memory device. One embodiment includes receiving memory access pattern data for at least one of a plurality of memory clients prior to a corresponding memory transaction with a DRAM memory device. Next, it is determined, based on the received memory access pattern data, that a future transaction of a first of the plurality of memory clients may create a future page conflict with a current transaction of a second of the plurality of memory clients. The future page conflict is then resolved by interleaving access to an associated bank in the DRAM memory device by the first and second memory clients according to the received memory access pattern data.

    Abstract translation: 系统，方法和计算机程序是游离缺失盘管理访问请求的DRAM存储设备。 一个实施例包括与DRAM存储器装置中的对应存储器事务之前接收对存储器的客户端的多个至少一个存储器存取模式数据。 接下来，确定开采，根据接收到的存储器访问模式的数据，做了第一存储客户端的多个可以创建存储客户端的多个第二的当前事务未来的分页冲突的未来交易。 未来分页冲突，然后由第一和第二存储器客户gemäß接收到的存储器存取模式数据交织在DRAM存储设备在相关银行获得解决。

    METHODS AND SYSTEMS FOR SMART REFRESH OF DYNAMIC RANDOM ACCESS MEMORY
    22.
    发明公开
    METHODS AND SYSTEMS FOR SMART REFRESH OF DYNAMIC RANDOM ACCESS MEMORY 有权
    方法和系统的动态随机存取存储器的智能升级

    公开(公告)号：EP2997576A1

    公开(公告)日：2016-03-23

    申请号：EP14727365.0

    申请日：2014-05-09

    Applicant: Qualcomm Incorporated

    Inventor： LO, Haw-Jing ,  CHUN, Dexter

    IPC: G11C11/406 ,  G11C11/4072 ,  G11C7/04 ,  G06F13/16

    CPC classification number: G11C11/40622 ,  G11C7/04 ,  G11C11/40603 ,  G11C11/40611 ,  G11C11/40626 ,  G11C11/4072

    Abstract: Methods and devices for refreshing a dynamic memory device, (e.g., DRAM) to eliminate unnecessary page refresh operations. A value in a lookup table for the page may indicate whether valid data including all zeros is present in the page. When the page includes valid data of all zeros, the lookup table value may be set so that refresh, memory read, write and clear accesses of the page may be inhibited and a valid value may be returned. A second lookup table may contain a second value indicating whether a page has been accessed by a page read or write during the page refresh interval. A page refresh, by issuing an ACT -PRE command pair, and a page address may be performed according to the page refresh interval when the second value indicates that page access has not occurred.

    SYSTEM AND METHOD FOR DYNAMIC MEMORY POWER MANAGEMENT
    23.
    发明公开
    SYSTEM AND METHOD FOR DYNAMIC MEMORY POWER MANAGEMENT 有权
    系统VERFAHRENFÜRDYNAMISCHE SPEICHERLEISTUNGSVERWALTUNG

    公开(公告)号：EP2915019A1

    公开(公告)日：2015-09-09

    申请号：EP13745935.0

    申请日：2013-07-19

    Applicant: Qualcomm Incorporated

    Inventor： LO, Haw-Jing ,  TAHA, Ali ,  CHUN, Dexter T.

    IPC: G06F1/32

    CPC classification number: G06F1/3225 ,  G06F1/3275 ,  G06F12/023 ,  Y02D10/14 ,  Y02D50/20

    Abstract: Various embodiments of methods and systems for hardware (“HW”) based dynamic memory management in a portable computing device (“PCD”) are disclosed. One exemplary method includes generating a lookup table (“LUT”) to track each memory page located across multiple portions of a volatile memory. The records in the LUT are updated to keep track of data locations. When the PCD enters a sleep state to conserve energy, the LUT may be queried to determine which specific memory pages in a first portion of volatile memory (e.g., an upper bank) contain data content and which pages in a second portion of volatile memory (e.g., a lower bank) are available for receipt of content. Based on the query, the location of the data in the memory pages of the upper bank is known and can be quickly migrated to memory pages in the lower bank which are identified for receipt of the data.

    Abstract translation: 公开了在便携式计算设备（“PCD”）中基于硬件（“HW”）的动态存储器管理的方法和系统的各种实施例。 一个示例性方法包括生成查找表（“LUT”）以跟踪位于易失性存储器的多个部分上的每个存储器页面。 更新LUT中的记录以跟踪数据位置。 当PCD进入睡眠状态以节省能量时，可以查询LUT以确定易失性存储器（例如，上部存储体）的第一部分中的哪些特定存储器页面包含数据内容以及易失性存储器的第二部分中的哪些页面 例如，较低的银行）可用于接收内容。 基于该查询，数据在上部存储器页面中的位置是已知的，并且可以被快速迁移到被识别用于接收数据的下部的存储器页面中。

    SYSTEM AND METHOD FOR REDUCING MEMORY I/O POWER VIA DATA MASKING
    26.
    发明公开
    SYSTEM AND METHOD FOR REDUCING MEMORY I/O POWER VIA DATA MASKING 审中-公开
    系统和方法减少数据掩蔽I / O内存性能

    公开(公告)号：EP3069345A1

    公开(公告)日：2016-09-21

    申请号：EP14812032.2

    申请日：2014-11-13

    Applicant: Qualcomm Incorporated

    Inventor： LO, Haw-Jing ,  CHUN, Dexter

    IPC: G11C7/10 ,  G06F13/16

    Abstract: Systems and methods are disclosed for reducing memory I/O power. One embodiment is a system comprising a system on chip (SoC), a DRAM memory device, and a data masking power reduction module. The SoC comprises a memory controller. The DRAM memory device is coupled to the memory controller via a plurality of DQ pins. The data masking power reduction module comprises logic configured to drive the DQ pins to a power saving state during a data masking operation.

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