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公开(公告)号：CA1230828A
公开(公告)日：1987-12-29
申请号：CA477201
申请日：1985-03-22
Applicant: SONY CORP
Inventor： KITAZATO NAOHISA , HAMADA OSAMU
IPC: G01D3/00 , G01D3/028 , G01H7/00 , G11B20/10 , H03G5/00 , H03G5/16 , H03H17/00 , H03H17/02 , H04R3/04
Abstract: A digital graphic equalizer includes a pulse-se-quence generator for generating a sequence of pulse signals, a first digital signal processor for filtering the pulse signals to produce a filtered signal, a digital-to-analog converter responsive to the filtered signal for producing a calibrating signal, and a loudspeaker responsive to the calibrating signal for propagating a calibrating sound in a listening environment, the frequency characteristics of the calibrating sound being subject to modification by the listening environment. A detector detects the calibrating sound as propagated in the listening environment and produces a detection signal representative thereof. An analog-to-digital converter is responsive to the detection signal for producing a digital signal corresponding thereto, and a second digital signal processor is responsive to the digital signal for producing a plurality of frequency-divided signals. A spectrum analyzer is responsive to the frequency-divided signals for analyzing the frequency characteristics of the calibrating sound as propagated in the listening environment and producing a compensating signal adapted to compensate for the modification by the listening environment of the frequency characteristics of the calibrating sound.
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公开(公告)号：GB2115588B
公开(公告)日：1985-10-02
申请号：GB8302850
申请日：1983-02-02
Applicant: SONY CORP
Inventor： HAMADA OSAMU
IPC: G06F7/00 , G06F9/00 , G06F9/06 , G06F9/22 , G06F9/24 , G06F9/38 , G06F17/14 , G06F17/15 , H03H17/02 , G06F13/00
Abstract: Described is a digital signal processor including at least two memories, that is, a microprogram memory for storing a series of microinstructions for instructing a digital signal processing procedure, and a coefficient memory for storing coefficient data required for performing a series of arithmetic operations on the digital signal data. These data being transferred and written into said microprogram memory and said coefficient memory from a host computer system. The coefficient memory has at least two pages corresponding to the total memory area which may be addressed during digital signal processing to be effected by said microinstructions. Page selection of the coefficient memory may be performed from said host computer system.
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公开(公告)号：FR2522232A1
公开(公告)日：1983-08-26
申请号：FR8301563
申请日：1983-02-01
Applicant: SONY CORP
Inventor： HAMADA OSAMU
IPC: G06F7/00 , G06F9/00 , G06F9/06 , G06F9/22 , G06F9/24 , G06F9/38 , G06F17/14 , G06F17/15 , H03H17/02 , H04N5/22 , G06F7/38 , G06F15/332
Abstract: Described is a digital signal processor including at least two memories, that is, a microprogram memory for storing a series of microinstructions for instructing a digital signal processing procedure, and a coefficient memory for storing coefficient data required for performing a series of arithmetic operations on the digital signal data. These data being transferred and written into said microprogram memory and said coefficient memory from a host computer system. The coefficient memory has at least two pages corresponding to the total memory area which may be addressed during digital signal processing to be effected by said microinstructions. Page selection of the coefficient memory may be performed from said host computer system.
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公开(公告)号：CA1082013A
公开(公告)日：1980-07-22
申请号：CA287312
申请日：1977-09-22
Applicant: SONY CORP
Inventor： HAMADA OSAMU
Abstract: SIGNAL PROCESSING SYSTEM A signal processing system, in which a music signal, varying repeatedly, is sampled at a given sampling period, and then a pulse row obtained is rearranged into a given pattern, thereby achieving a new pulse row. In addition, read-out means for reproducing the pulse row thus achieved into a wave form of an original music signal is provided.
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Patent Agency Ranking
公开(公告)号：AU3977778A
公开(公告)日：1980-03-20
申请号：AU3977778
申请日：1978-09-12
Applicant: SONY CORP
Inventor： HAMADA OSAMU
Abstract: In a tone generating apparatus for an electrical music instrument having an array of switches corresponding to respective keys of a keyboard and which are selectively actuable by manipulation of the respective keys, a timing signal generator, preferably including a shift register, has a repetitive operating cycle and is connected with the switches for providing timing signals in response to actuation of the latter, with each of the timing signals occurring at a time during the operating cycle which corresponds to the position of the respective actuated switch in the switch array, an exponential signal generator provides an exponential signal in synchronism with the operating cycle of the timing signal generator, a sample and hold circuit receives the exponential signal and is operative to sample and hold a value of the exponential signal in dependence on the time of occurrence of a timing signal in the operating cycle, and variable frequency oscillator controlled in accordance with the value of the exponential signal which is sampled and held for providing an output oscillation having a frequency determined by a selectively actuated one of the switches.
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公开(公告)号：AU8065175A
公开(公告)日：1976-11-04
申请号：AU8065175
申请日：1975-04-30
Applicant: SONY CORP
Inventor： NAKAMURA HIDEO , OHSAWA MITSUO , HAMADA OSAMU
IPC: H01L21/331 , H01L21/8222 , H01L27/06 , H01L27/07 , H01L29/00 , H01L29/73 , H03B19/14
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公开(公告)号：DE2607443A1
公开(公告)日：1976-10-07
申请号：DE2607443
申请日：1976-02-24
Applicant: SONY CORP
Inventor： HAMADA OSAMU
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公开(公告)号：AU7954775A
公开(公告)日：1976-09-30
申请号：AU7954775
申请日：1975-03-26
Applicant: SONY CORP
Inventor： HAMADA OSAMU
Abstract: A protective circuit for a pulse width modulated signal amplifier includes a signal input circuit, a carrier signal generator, a pulse width modulator for receiving both the output signals of the signal input circuit and the carrier signal generator and for producing a pulse width modulated signal, an amplifier for receiving the pulse width modulated signal and for amplifying it to drive a load through a low pass filter, a detecting circuit for detecting whether the pulse width modulated signal is present or not, or detecting DC voltage of undesirable duration produced at the output of the amplifier and for producing a control signal, and a protective circuit activated by the control signal for cutting off the operation of the amplifier.
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