公开(公告)号：JP2007060727A

公开(公告)日：2007-03-08

申请号：JP2006327497

申请日：2006-12-04

Applicant: Sony Corp ,  ソニー株式会社

Inventor： SATO SADAJI ,  AOKI TETSUYA ,  MUTO TAKAYASU

IPC: H04L29/10 ,  H04L12/28 ,  H04L12/801 ,  H04L12/841 ,  H04L12/911 ,  H04L29/08

Abstract: PROBLEM TO BE SOLVED: To provide a signal processing circuit capable of automatically performing late processing of the transmission and achieving accurate packet transmission. SOLUTION: A post-transmission processing circuit 107A sets a LATE threshold LTH according to the fractions of the unit packets set in the CFR 111 by the CPU 30, decides from the relationship between a current time CT and the late threshold LTH whether or not a time stamp set by the pre-transmission processing circuit 106 and stored in a FIFO 110 is valid, transmits a packet when the time stamp is valid, and does not transmit it but processes the next packet when it is invalid. COPYRIGHT: (C)2007,JPO&INPIT

Abstract translation: 要解决的问题：提供能够自动执行传输的后期处理并实现精确的分组传输的信号处理电路。 解决方案：后发送处理电路107A根据CPU30在CFR 111中设置的单位分组的分数来设置LATE阈值LTH，根据当前时间CT和晚期阈值LTH之间的关系来确定是否 或者由预先发送处理电路106设置并且存储在FIFO 110中的时间戳有效，当时间戳有效时发送分组，并且不发送分组，而是在无效时处理下一个分组。 版权所有（C）2007，JPO＆INPIT

公开(公告)号：JP2005201737A

公开(公告)日：2005-07-28

申请号：JP2004007223

申请日：2004-01-14

Applicant: Sony Corp ,  ソニー株式会社

Inventor： KATO REIJI ,  MUTO TAKAYASU

IPC: G01S1/00 ,  G01S19/23 ,  G01S19/24 ,  G01S19/34 ,  G01S19/37 ,  G01S5/14

CPC classification number: G01S19/24 ,  G01S19/235

Abstract: PROBLEM TO BE SOLVED: To provide a communication device for acquiring a result of positioning at a high speed while suppressing power consumption.
SOLUTION: From a GPS receiver, a host CPU 50 acquires an error value in an original oscillation frequency of a crystal oscillator 40 and stores it in a storage part 60. This value is transmitted to the GPS receiver at a next positioning calculation to correct a reference frequency, causing it to search for a GPS satellite. This dispenses with the supply of electric power to the GPS receiver 30 and to the crystal oscillator 40 except for the occasion of positioning calculation. Power consumption can be suppressed and a result of positioning can be acquired at a high speed.
COPYRIGHT: (C)2005,JPO&NCIPI

Abstract translation: 要解决的问题：提供一种用于在抑制电力消耗的同时高速地获取定位结果的通信装置。 解决方案：主机CPU 50从GPS接收机获取晶体振荡器40的原始振荡频率的误差值，并将其存储在存储部分60中。该值在下一个定位计算中被发送给GPS接收机 以校正参考频率，使其搜索GPS卫星。 除了定位计算之外，这不需要向GPS接收器30和晶体振荡器40提供电力。 能够抑制功耗，能够高速获取定位的结果。 版权所有（C）2005，JPO＆NCIPI

公开(公告)号：JP2004032376A

公开(公告)日：2004-01-29

申请号：JP2002185912

申请日：2002-06-26

Applicant: Sony Corp ,  ソニー株式会社

Inventor： TAKADA MASAYUKI ,  MUTO TAKAYASU

IPC: G01S19/25 ,  H04B7/26 ,  H04M11/00 ,  H04W12/02 ,  H04W12/08 ,  H04W64/00 ,  H04W88/02 ,  H04W88/18 ,  H04Q7/20 ,  G01S5/14 ,  H04Q7/38

Abstract: PROBLEM TO BE SOLVED: To perform authentication between a mobile phone and a server apparatus in the case of transmitting position time information calculated by a GPS function to the server apparatus. SOLUTION: When the mobile phone 10 provided with the GPS function and a network function transmits information with respect to a position and a time (position time information) obtained by using the GPS function to the server apparatus 30, authentication between the mobile phone 10 and the server apparatus 30 is performed. Only when it is authenticated that the server apparatus 30 is a legitimate access object, the mobile phone 100 transmits the position time information to the server apparatus 30. COPYRIGHT: (C)2004,JPO

公开(公告)号：JP2002077309A

公开(公告)日：2002-03-15

申请号：JP2000254440

申请日：2000-08-24

Applicant: SONY CORP

Inventor： MUTO TAKAYASU

IPC: G06F13/38 ,  G06F1/04 ,  H04L12/28 ,  H04L12/40 ,  H04L12/46 ,  H04L29/10

Abstract: PROBLEM TO BE SOLVED: To provide a signal-processing circuit for PCI that can prevent wasteful power consumption. SOLUTION: The signal-processing circuit comprises a physical layer circuit 11 for monitoring the connection state of an IEEE 1394 serial interface bus BS, and generating and transmitting a CAN signal that indicates that an IEEE 1394 serial interface bus cable is not connected to a connection node if it is not connected; and a link layer circuit 12 having a clock control circuit 120 for determining that the IEEE 1394 serial interface bus cable is not connected to the connection node of the physical layer circuit 11, when it receives the CAN signal from the physical layer circuit 11; setting a CLKRUN# signal to a high level; and reporting to a central resource that a PCI cock is not required.

公开(公告)号：JP2000101646A

公开(公告)日：2000-04-07

申请号：JP27218398

申请日：1998-09-25

Applicant: SONY CORP

Inventor： MUTO TAKAYASU

IPC: H04L12/40 ,  H04L12/70 ,  H04L12/56

Abstract: PROBLEM TO BE SOLVED: To provide a signal processing circuit capable of preventing dispersion in transmission timing of packets to be sent out to a serial interface bus. SOLUTION: A link core 120 of a link layer circuit 12 is used for transmitting/receiving signals containing control and data with a physical layer circuit 11 having peculiar control timing. A storage circuit 13 is provided for previously storing control timing data selected corresponding to the peculiar control timing of the physical layer circuit H connected to the link layer circuit 12. The link layer circuit 12 is provided with an auto load circuit 130 and a register 129 for setting the control timing data stored in the storage circuit 13 so as to be used for exchanging the signals containing the control and data between the link core 120 and physical layer circuit 11 through the auto load circuit 130.

公开(公告)号：JP2508466B2

公开(公告)日：1996-06-19

申请号：JP22907286

申请日：1986-09-27

Applicant: SONY CORP

Inventor： MUTO TAKAYASU ,  TADA TORYU

IPC: G11B21/10 ,  G11B21/08

公开(公告)号：JPH07130101A

公开(公告)日：1995-05-19

申请号：JP29451193

申请日：1993-10-29

Applicant: SONY CORP

Inventor： MUTO TAKAYASU

IPC: G11B20/10

Abstract: PURPOSE:To accurately record and reproduce recording data by performing recording and reproducing when a phase of a fundamental clock is matched with a phase of a channel clock. CONSTITUTION:The phase of the channel clock whose frequency is varied in accordance with recording and reproducing positions is controlled to match with the phase of the fundamental clock from a 1st VCO 32 controlled to output the fundamental clock of the phase matched with a phase of detecting data of a servo pattern recorded at prescribed intervals in a magneto-optical disk 1. In this magneto-optical disk recording and reproducing device, 1st and 2nd check timing pulses are outputted at prescribed intervals by a check timing circuit 42, and whether an edge of the fundamental clock exists between the two pulses or not is detected by a clock discriminating circuit 41. Then, when the edge of the fundamental clock exists between the two pulses, a recording system 4 or reproducing system 3 is controlled by a processor 40 to perform recording or reproducing.

公开(公告)号：JPH06243586A

公开(公告)日：1994-09-02

申请号：JP3097693

申请日：1993-02-19

Applicant: SONY CORP

Inventor： YAMAGAMI TAMOTSU ,  MUTO TAKAYASU

IPC: G11B20/10

Abstract: PURPOSE:To prevent the deterioration in the frequency characteristic of servo pattern detection data occurring at the time of recording and reproducing the outer peripheral side of a magneto-optical disk and to output a channel clock with a precise phase. CONSTITUTION:The position of a pickup provided in an optical system 9 on the magneto-optical disk 1 rotated and driven with a fixed angular velocity is detected by a processor 36 provided in a channel clock forming device 2. Then, by a gain correction circuit 31, the level of phase error detection data showing the phase error of the channel clock for the servo pattern detection data formed by a phase generator 23 is corrected based on the detected position of the pickup. The phase error detection data are supplied to a VCO 35 through a D/A converter 33, a phase compensation circuit 34. By the VCO 35, the frequency of the channel clock outputted according to the phase error detection data is varied.

公开(公告)号：JPH05114260A

公开(公告)日：1993-05-07

申请号：JP30233291

申请日：1991-10-22

Applicant: SONY CORP

Inventor： MUTO TAKAYASU

IPC: G11B21/10 ,  G11B19/00

Abstract: PURPOSE:To reduce the power consumption of a magnetic disk device when the device is in a stand-by state. CONSTITUTION:A head position detecting section 13 detects the stand-by state of this magnetic disk device and supplies a stand-by state switching signal to a DSP 15. Upon receiving the signal, the DSP 15 controls the supply of electric currents to each servo processing circuit, such as an R/W amplifier 131, servo detection circuit 134, and positional information generation circuit 138.

公开(公告)号：JPH03214473A

公开(公告)日：1991-09-19

申请号：JP910390

申请日：1990-01-18

Applicant: SONY CORP

Inventor： MUTO TAKAYASU ,  HAMAMOTO HISASHI

IPC: G11B21/08

Abstract: PURPOSE:To prevent the runaway of a head travel means occurring by interrupting the travel of a head by controlling a servo device when the fact that no track detecting output is obtained appropriately is detected with an abnormality detecting means. CONSTITUTION:A reticle 9 and a scale 10 are provided with slits of prescribed interval, respectively, and light quantity made incident on a photodetector 11 in accordance with the turn of a heat arm 2 is varied, and the detecting output DET1-DET4 are outputted, and they are converted to differentiation signals, and the travel speed of the heads 4A-4D are detected. A multiplex circuit 15 receives the detecting output, and outputs a position detection signal Sp. A control circuit 40, when detecting the fact that no voltage in which a prescribed voltage is converted with an A/D conversion circuit 55 is obtained from a reference voltage source 54 after a speed control signal is generated, or the fact that no pulse generating at every traverse of a track is obtained from a comparator 21, interrupts the generation of the speed control signal. In such a way, it is possible to prevent the runaway of an arm 2 occurring, and to evade the damage of a magnetic disk and that of the heads 4A-4D.