公开(公告)号：EP1006525A1

公开(公告)日：2000-06-07

申请号：EP98830718.7

申请日：1998-12-01

Applicant: STMicroelectronics S.r.l.

Inventor： Bruccoleri, Melchiorre ,  Demicheli, Marco ,  Ottini, Daniele ,  Savo, Alessandro

IPC: G11B20/00

CPC classification number: G11B20/10277 ,  G11B20/10509

Abstract: A read and analog-to-digital data conversion channel comprising preamplifying circuits (Pre-Amp), automatic gain control circuits (VGA), harmonics filters (MRA), equalizing low pass filters (LPF), a time interleaved analog-to-digital converter (INTERLEAVED ATOD) including a pair of identical analog/digital converters (ATOD_EVEN, ATOD_ODD) functioning in parallel and at a half clock frequency, subdividing the signal path into two parallel paths through said two identical converters, one for even bits and the other for odd bits, and a digital post-processing block (DIGITAL Post Processing) fed by two output streams of said time interleaved converter (INTERLEAVED ATOD) and outputting a reconstructed data stream (DATA) and controlling said circuits, through dedicated digital-to-analog converters (DAC_VGA, DAC_MRA, DAC_FC, DAC_BOOST), means for compensating the offset of the digital-to-analog converters contained in said pair of identical analog-to-digital converters (ATOD_EVEN, ATOD_ODD) of said time interleaved converter (INTERLEAVED ATOD), controlled by said post-processing block (DIGITAL Post Processing) through a digital-to-analog converter, further comprises two distinct offset compensating circuits, each composed of an offset compensating stage (OFFSET_EVEN_STAGE, OFFSET_ODD_STAGE) independently controlled by said digital post-processing block through a dedicated digital-to-analog converter (DAC_OFF_E, DAC_OFF_O), preventing appearance of spurious patterns in frequency domain.

Abstract translation: 读和模数转换通道，包括前置放大电路（Pre-Amp），自动增益控制电路（VGA），谐波滤波器（MRA），均衡低通滤波器（LPF），时间交错模数转换 转换器（INTERLEAVED ATOD）包括一对并行和半个时钟频率工作的一对相同的模拟/数字转换器（ATOD_EVEN，ATOD_ODD），将信号路径细分为通过所述两个相同转换器的两个并行路径，一个用于偶数位，另一个用于偶数位 以及由所述时间交织转换器（INTERLEAVED ATOD）的两个输出流馈送的数字后处理块（DIGITAL Post Processing），并输出重构数据流（DATA）并通过专用数字 - 模拟转换器（DAC_VGA，DAC_MRA，DAC_FC，DAC_BOOST），用于补偿包含在所述相同模数转换器对（ATOD_EVEN，ATOD_ODD）中的数/模转换器的偏移量的装置 由所述后处理块（DIGITAL后处理）通过数模转换器控制的所述时间交织转换器（INTERLEAVED ATOD）还包括两个不同的偏移补偿电路，每个偏移补偿电路由偏移补偿级（OFFSET_EVEN_STAGE，OFFSET_ODD_STAGE ）通过专用数模转换器（DAC_OFF_E，DAC_OFF_O）独立地由所述数字后处理块控制，从而防止在频域中出现杂散模式。