公开(公告)号：US20130292824A1

公开(公告)日：2013-11-07

申请号：US13873103

申请日：2013-04-29

Applicant: STMICROELECTRONICS SA

Inventor： Sylvain Joblot ,  Pierre Bar

IPC: H01L23/28 ,  H01L23/538 ,  H01L21/768

CPC classification number: H01L23/28 ,  H01L21/486 ,  H01L21/76877 ,  H01L23/147 ,  H01L23/481 ,  H01L23/49822 ,  H01L23/5384 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00

Abstract: A chip provided with through vias wherein the vias are formed of an opening with insulated walls coated with a conductive material and filled with an easily deformable insulating material, elements of connection to another chip being arranged in front of the easily deformable insulating material.

Abstract translation: 具有通孔的芯片，其中通孔由具有绝缘壁的开口形成，绝缘壁涂覆有导电材料，并且填充有易变形的绝缘材料，与另一芯片的连接元件布置在容易变形的绝缘材料的前面。