公开(公告)号：WO1991007809A1

公开(公告)日：1991-05-30

申请号：PCT/US1990006856

申请日：1990-11-21

Applicant: TANDEM COMPUTERS INCORPORATED

Inventor： TANDEM COMPUTERS INCORPORATED ,  TIGHE, Donald, J. ,  NEILSON, Joseph, S.

IPC: H02M07/04

CPC classification number: H02M1/4216 ,  H02J3/26 ,  H02M7/23 ,  H02M2001/4283 ,  Y02B70/126 ,  Y02E40/50 ,  Y10T307/516 ,  Y10T307/625

Abstract: A balanced three phase AC power supply (12) for a computer system having unbalanced, variable DC loads (34). AC to DC converters (18a-c) utilize high power factor correction circuitry to impose a sinusoidal current loading waveshape (23) substantially in phase with the AC voltage (24). Each AC to DC converter outputs equal DC voltages maintaining a balanced loading on the AC power source. The design and organization of the power supply components make the supply fault tolerant when one phase (øA, øB, øC) of AC power or one AC to DC converter is lost due to malfunction or servicing.

公开(公告)号：WO1987003441A1

公开(公告)日：1987-06-04

申请号：PCT/US1986002561

申请日：1986-11-26

Applicant: TANDEM COMPUTERS INCORPORATED ,  HARRIS CORPORATION

Inventor： TANDEM COMPUTERS INCORPORATED ,  HARRIS CORPORATION ,  BUSTAMANTE, Herman, A. ,  LEMON, John, A. ,  STAPOR, Harry, J.

IPC: H04B07/185

CPC classification number: H04B7/18513

Abstract: A system (20, 22) for compensating for varying attenuation of an uplink signal from a local node to a satellite. The system (20, 22) monitors two beacon signals and the local downlink signal to determine fade. An error signal, indicating the uplink fade, is generated and utilized to adjust the gain of the uplink transmitter (42) to compensate for the fade.

Abstract translation: 一种用于补偿从本地节点到卫星的上行链路信号变化衰减的系统（20,22）。 系统（20,22）监视两个信标信号和本地下行链路信号以确定衰落。 产生指示上行衰落的误差信号，并用于调整上行链路发射机（42）的增益以补偿衰落。

公开(公告)号：WO1986001055A1

公开(公告)日：1986-02-13

申请号：PCT/US1985001381

申请日：1985-07-19

Applicant: TANDEM COMPUTERS INCORPORATED

Inventor： TANDEM COMPUTERS INCORPORATED ,  WANG, Hsienchin, W.

IPC: H03K19/092

CPC classification number: H03K19/0826 ,  H03K19/0136

Abstract: A driver-circuit for simultaneously setting up a plurality of output buffers of a 3-stage gate array into and out of a floating state using low control current. A buffer driver transistor (96) is provided for each output buffer with the primary control path of that transistor introducing a control circuit to the respected output buffer. A common driver transistor (108) has a primary current path which provides a control signal to the control electrodes of a plurality of buffer driver transistors (96). Clamp means are provided for discharging the conductor means (40) to ground upon turn-off of the common driver transistor. Clamp means preferably includes a clamp transistor (106) having a primary current path coupled between the conductor means and ground and having a differentiator (102, 104) coupled to the common driver transistor (108) for detecting the leading edge of turn-off of that transistor (108) and in response thereto momentarily, dynamically turning on the clamp transistor (106) to couple the conductor means to ground and thereby discharge any effective capacitance of the conductor means (40) to ground.

Abstract translation: 一种驱动器电路，用于使用低控制电流同时设置3级门阵列的多个输出缓冲器进出浮动状态。 为每个输出缓冲器提供缓冲驱动晶体管（96），其中该晶体管的主控制路径将控制电路引入所述输出缓冲器。 公共驱动晶体管（108）具有向多个缓冲驱动晶体管（96）的控制电极提供控制信号的初级电流路径。 提供钳位装置，用于在公共驱动晶体管断开时将导体装置（40）放电到地。 钳位装置优选地包括钳位晶体管（106），钳位晶体管（106）具有耦合在导体装置和地之间的初级电流路径，并具有耦合到公共驱动晶体管（108）的微分器（102,104），用于检测 所述晶体管（108）并且响应于此瞬时地动态地导通钳位晶体管（106）以将导体装置接地，从而将导体装置（40）的任何有效电容放电到地。

公开(公告)号：WO1998002812A1

公开(公告)日：1998-01-22

申请号：PCT/US1997011886

申请日：1997-07-10

Applicant: TANDEM COMPUTERS INCORPORATED

Inventor： TANDEM COMPUTERS INCORPORATED ,  SCHOFIELD, Andrew

IPC: G06F09/46

CPC classification number: G06F9/547 ,  G06F9/548

Abstract: A method and apparatus for performing distributed object calls uses proxies and memory allocation and deallocation. Specifically, an object reference to an object is obtained. The object reference is used to create a proxy handle data structure that will represent the object. The proxy handle is passed to a client application stub function which calls the object. The stub function is also passed input and output parameters along with exception information. An object request broker finds an appropriate implementation in a server application. The server application allocates memory for implementing the call. The object is implemented and the memory allocated by the server application is deallocated. The server application responds to the client, whereupon the client makes another object call using the same proxy handle or destroys the proxy handle. Multiple initialization of object calls is avoided because the object call can be initialized just once for a particular object. Moreover, resources are preserved by minimizing wild pointers and memory leaks that can occur during the calling and implementation of objects.

Abstract translation: 用于执行分布式对象调用的方法和装置使用代理和存储器分配和释放。 具体地，获得对象的对象引用。 对象引用用于创建代表对象的代理句柄数据结构。 代理句柄被传递给调用该对象的客户端应用程序存根功能。 存根功能还传递输入和输出参数以及异常信息。 对象请求代理在服务器应用程序中找到适当的实现。 服务器应用程序分配用于实现呼叫的内存。 该对象被实现，由服务器应用程序分配的内存被释放。 服务器应用程序响应客户端，因此客户端使用相同的代理句柄进行另一个对象调用或销毁代理句柄。 避免了对象调用的多次初始化，因为对象调用只能针对特定对象初始化一次。 此外，通过最小化在调用和实现对象期间可能发生的野生指针和内存泄漏来保护资源。

公开(公告)号：WO1998002810A1

公开(公告)日：1998-01-22

申请号：PCT/US1997011883

申请日：1997-07-10

Applicant: TANDEM COMPUTERS INCORPORATED

Inventor： TANDEM COMPUTERS INCORPORATED ,  SCHOFIELD, Andrew

IPC: G06F09/46

CPC classification number: G06F9/465 ,  Y10S707/99942

Abstract: A method and apparatus for transporting IDL-defined data structures to and from a format convenient for transport between two computers are disclosed. The data structures are originally described in a string. The string description is converted to a different format containing additional information about the alignment and size of the data structure. An application in the sending computer removes the alignment form the data structure and stores the data structure in a buffer. The data structure is stored in the output buffer in a predetermined format that is based upon the type of the data structure. The buffer is then transmitted to a data file or to the memory of the receiving computer. The receiving computer extracts the data structure from the buffer based upon the predetermined format. The data structure is realigned and stored in the memory of the second computer.

Abstract translation: 公开了一种用于将IDL定义的数据结构传送到便于在两台计算机之间传输的格式的方法和装置。 数据结构最初以字符串形式描述。 字符串描述转换为包含有关数据结构对齐和大小的附加信息的不同格式。 发送计算机中的应用程序从数据结构中删除对齐形式并将数据结构存储在缓冲区中。 数据结构以基于数据结构的类型的预定格式存储在输出缓冲器中。 然后将缓冲器发送到数据文件或接收计算机的存储器。 接收计算机基于预定格式从缓冲器中提取数据结构。 数据结构重新排列并存储在第二台计算机的存储器中。

公开(公告)号：WO1996023317A1

公开(公告)日：1996-08-01

申请号：PCT/US1996000855

申请日：1996-01-23

Applicant: TANDEM COMPUTERS INCORPORATED

Inventor： TANDEM COMPUTERS INCORPORATED ,  PUTZOLU, Franco ,  MURTHY, Srinivasa, D. ,  USAS, Alan, M. ,  TOM, Gary, F. ,  GUPTA, Minoo ,  STRELLIS, Eric, G.

IPC: H01J31/00

CPC classification number: G06F9/544 ,  G06F17/30067

Abstract: A loosely coupled multi-processor implementing a Posix file system, including pipes and fifos. A pipe server (214) and a pipe library together implement the complete fifo semantics required by Posix and offers these capabilities to any process (216) using the Posix interface.

Abstract translation: 实现Posix文件系统的松耦合多处理器，包括管道和fifos。 管道服务器（214）和管道库一起实现Posix所需的完整fifo语义，并使用Posix接口向任何进程（216）提供这些功能。

公开(公告)号：WO1996023262A1

公开(公告)日：1996-08-01

申请号：PCT/US1996000502

申请日：1996-01-16

Applicant: TANDEM COMPUTERS INCORPORATED

Inventor： TANDEM COMPUTERS INCORPORATED ,  HARINARAYAN, Venkatesh ,  MURTHY, Srinivasa, D. ,  ROWE, Alan, L.

IPC: G06F13/14

CPC classification number: G06F11/1482 ,  G06F9/52 ,  G06F11/1425 ,  G06F2201/82 ,  G06F2201/825

Abstract: An apparatus and method, using an inter-processor lock to control access to inter-process relationship data structures in the memory (3a, 3b, ..., 3n) of each processor (2a, 2b, ..., 2n) in a multiprocessor system (1). The apparatus and method insure that each inter-process relationship is modified in the same sequence on each processor (2a, 2b, ..., 2n). The apparatus and method also insure that an inter-process relationship is maintained in a consistent state in the face of failure of any of the processors (2a, 2b, ..., 2n).

Abstract translation: 一种装置和方法，使用处理器间锁来控制对每个处理器（2a，2b，...，2n）的存储器（3a，3b，...，3n）中的处理间关系数据结构的访问 多处理器系统（1）。 该装置和方法确保在每个处理器（2a，2b，...，2n）上以相同的顺序修改每个处理间关系。 该装置和方法还确保在面对任何处理器（2a，2b，...，2n）的故障时，处理间关系被保持在一致状态。

公开(公告)号：WO1991007799A1

公开(公告)日：1991-05-30

申请号：PCT/US1990006862

申请日：1990-11-21

Applicant: TANDEM COMPUTERS INCORPORATED

Inventor： TANDEM COMPUTERS INCORPORATED ,  TIGHE, Donald, J. ,  NEILSON, Joseph, S.

IPC: H02H09/00

CPC classification number: H02H9/004 ,  H02H9/02

Abstract: A system for preventing voltage drops when a load circuit (12) is connected and preventing arcing when a load is disconnected from an energized bus (14) includes a current limit device (26) and low impedance shunt (28) that bypasses the current limit device when activated. The system activates the low impedance shunt only after a load capacitance is charged when the load is connected and deactivates the low impedance shunt prior to disconnecting the load.

公开(公告)号：WO1991004530A1

公开(公告)日：1991-04-04

申请号：PCT/US1990005154

申请日：1990-09-12

Applicant: TANDEM COMPUTERS INCORPORATED

Inventor： TANDEM COMPUTERS INCORPORATED ,  CHANDRAN, Srikumar, R. ,  MAU, Franco, E. ,  JAN, Steven, A.

IPC: G06F11/10

CPC classification number: H04L1/0057 ,  H03M13/09 ,  H03M13/6575

Abstract: Error detection of digital data transmitted on an optic link (18a-18b) is accomplished by creating, before transmission, a check code comprising check bits that correspond to spaced one of the data bits forming the plurality of bits. The check code is then transmitted with the plurality of bits (Fig. 1) to a receiver (32), where the plurality of bits are used to create an error code in the same manner as the check code, the error and check codes compare, and an indication of error (64) generated when a miscompare is detected.

公开(公告)号：WO1990008407A1

公开(公告)日：1990-07-26

申请号：PCT/US1990000253

申请日：1990-01-10

Applicant: TANDEM COMPUTERS INCORPORATED

Inventor： TANDEM COMPUTERS INCORPORATED ,  FERCHAU, Joerg, U. ,  DAVIS, Hugh, M., Jr. ,  HUNT, Christopher, Allen

IPC: H01R13/62

CPC classification number: H01R13/62933

Abstract: An insertion/extraction mechanism (2) is used to cause blind mateable electrical connectors (10) on an electrical module (4) to engage and disengage mating electrical connectors (12) in a housing (6) by forcing the module (4) to and from its fully inserted position within the housing (6). The mechanism includes a U-shaped handle (14) pivotally mounted to the module at its ends through elastomeric sleeves (30). The sleeves (30) are each mounted in a mounting hole (32) in the module (4) and each has a central bore (38) within which a mounting shaft (40), extending from the handle, is housed. Each end of the handle (14) has a camming surface (54) which engages a pivot pin (16) carried by the housing as the handle (14) is pivoted while inserting the module (4) into and withdrawing the module from the housing. This engagement of the camming surfaces (54) and the pivot pins (16) causes the handle ends and the associated mounting shafts to push radially against the elastomeric sleeves (30) as the handle is pivoted during insertion and extraction. The elastomeric sleeves (30) both support the mounting shafts and provide the desired biasing force to help keep the module (4) fully inserted within the housing (6).