公开(公告)号：US20160163691A1

公开(公告)日：2016-06-09

申请号：US15042233

申请日：2016-02-12

Applicant: Texas Instruments Incorporated

Inventor： Henry Litzmann EDWARDS ,  Akram A. SALMAN

IPC: H01L27/02 ,  H01L29/66 ,  H01L29/74

CPC classification number: H01L27/0262 ,  H01L21/26513 ,  H01L21/266 ,  H01L21/823892 ,  H01L23/5283 ,  H01L27/092 ,  H01L27/0928 ,  H01L29/66371 ,  H01L29/742

Abstract: An integrated circuit includes an NMOS SCR in which a p-type body well of the NMOS transistor provides a base layer for a vertical NPN layer stack. The base layer is formed by implanting p-type dopants using an implant mask which has a cutout mask element over the base area, so as to block the p-type dopants from the base area. The base layer is implanted concurrently with p-type body wells under NMOS transistors in logic components in the integrated circuit. Subsequent anneals cause the p-type dopants to diffuse into the base area, forming a base with a lower doping density that adjacent regions of the body well of the NMOS transistor in the NMOS SCR. The NMOS SCR may have a symmetric transistor, a drain extended transistor, or may be a bidirectional NMOS SCR with a symmetric transistor integrated with a drain extended transistor.

Abstract translation: 集成电路包括NMOS SCR，其中NMOS晶体管的p型体阱为垂直NPN层堆叠提供基极层。 通过使用在基底区域上具有切口掩模元件的注入掩模注入p型掺杂剂来形成基底层，以便从基底区域阻挡p型掺杂剂。 基极层与集成电路中的逻辑元件中NMOS晶体管的p型体阱同时注入。 随后的退火导致p型掺杂剂扩散到基极区域中，形成具有较低掺杂密度的基极，即在NMOS SCR中的NMOS晶体管的主体阱的相邻区域。 NMOS SCR可以具有对称晶体管，漏极延伸晶体管，或者可以是具有与漏极延伸晶体管集成的对称晶体管的双向NMOS SCR。

公开(公告)号：US20130207168A1

公开(公告)日：2013-08-15

申请号：US13768037

申请日：2013-02-15

Applicant: Texas Instruments Incorporated

Inventor： Henry Litzmann EDWARDS ,  Dimitar Trifonov TRIFONOV

IPC: H01L31/0236

CPC classification number: H01L31/02366 ,  H01L31/02161 ,  H01L31/02327 ,  H01L31/103

Abstract: A semiconductor device contains a photodiode formed in a substrate of the semiconductor device. At a top surface of the substrate, over the photodiode, a surface grating of periodic field oxide in a periodic configuration and/or gate structures in a periodic configuration is formed. The field oxide may be formed using an STI process or a LOCOS process. A semiconductor device with a surface grating including both field oxide and gate structures has the gate structures over the semiconductor substrate, between the field oxide. The surface grating has a pitch length up to 3 microns. The surface grating covers at least half of the photodiode.

Abstract translation: 半导体器件包含形成在半导体器件的衬底中的光电二极管。 在衬底的顶表面上，在光电二极管上，形成周期性构造的周期性场氧化物的表面光栅和/或周期性构造的/或栅极结构。 场氧化物可以使用STI工艺或LOCOS工艺形成。 具有包括场氧化物和栅极结构的表面光栅的半导体器件在半导体衬底之间具有位于场氧化物之间的栅极结构。 表面光栅具有高达3微米的间距长度。 表面光栅覆盖光电二极管的至少一半。