公开(公告)号：US10121847B2

公开(公告)日：2018-11-06

申请号：US15462741

申请日：2017-03-17

Applicant: Texas Instruments Incorporated

Inventor： Benjamin Stassen Cook ,  Barry Jon Male ,  Robert Alan Neidorff

IPC: H01L23/495 ,  H01L49/02 ,  H01L23/66

Abstract: A galvanic isolation device includes a first integrated circuit (IC) die that has communication circuitry formed in a circuit layer below the top surface. A first conductive plate is formed on the IC die proximate the top surface, and is coupled to the communication circuitry. A dielectric isolation layer is formed over a portion of the top surface of the IC after the IC is fabricated such that the dielectric isolation layer completely covers the conductive plate. A second conductive plate is juxtaposed with the first conductive plate but separated by the dielectric isolation layer such that the first conductive plate and the second conductive plate form a capacitor. The second conductive plate is configured to be coupled to a second communication circuit.

公开(公告)号：US20180269272A1

公开(公告)日：2018-09-20

申请号：US15462741

申请日：2017-03-17

Applicant: Texas Instruments Incorporated

Inventor： Benjamin Stassen Cook ,  Barry Jon Male ,  Robert Alan Neidorff

IPC: H01L49/02 ,  H01L23/66 ,  H01L23/495

CPC classification number: H01L28/60 ,  H01L23/49575 ,  H01L23/66 ,  H01L2223/6611

Abstract: A galvanic isolation device includes a first integrated circuit (IC) die that has communication circuitry formed in a circuit layer below the top surface. A first conductive plate is formed on the IC die proximate the top surface, and is coupled to the communication circuitry. A dielectric isolation layer is formed over a portion of the top surface of the IC after the IC is fabricated such that the dielectric isolation layer completely covers the conductive plate. A second conductive plate is juxtaposed with the first conductive plate but separated by the dielectric isolation layer such that the first conductive plate and the second conductive plate form a capacitor. The second conductive plate is configured to be coupled to a second communication circuit.

公开(公告)号：US20180190628A1

公开(公告)日：2018-07-05

申请号：US15395584

申请日：2016-12-30

Applicant: Texas Instruments Incorporated

Inventor： Barry Jon Male ,  Benjamin Cook ,  Robert Alan Neidorff ,  Steve Kummerl

IPC: H01L25/16 ,  H01L31/02 ,  H01L31/167 ,  H01L49/02 ,  H01L23/00 ,  H01L23/495

CPC classification number: H01L25/167 ,  H01F38/14 ,  H01L23/315 ,  H01L23/49 ,  H01L23/49575 ,  H01L24/08 ,  H01L24/48 ,  H01L24/85 ,  H01L28/10 ,  H01L31/02005 ,  H01L31/0203 ,  H01L31/101 ,  H01L31/103 ,  H01L31/1105 ,  H01L31/167 ,  H01L33/00 ,  H01L33/62 ,  H01L2224/08113 ,  H01L2224/48091 ,  H01L2224/48245 ,  H01L2924/12041 ,  H01L2924/12043 ,  H04B10/803

Abstract: Disclosed examples include integrated circuits with a leadframe structure, a first circuit structure including a light source configured to generate a light signal along an optical path, a second circuit structure including a light sensor facing the optical path to receive the light signal, and a molded package structure enclosing portions of the leadframe structure, the molded package structure having a cavity defined by an interior surface of the molded package structure, the optical path extending in the cavity between the first and second circuit structures.