Bidirectional re-driver for half-duplex interfaces

    公开(公告)号:US11356236B2

    公开(公告)日:2022-06-07

    申请号:US16827415

    申请日:2020-03-23

    Abstract: Circuit including a first port to couple to a first device; a second port to couple to a second device; a first channel having an input coupled to first port and an output coupled to second port, the first channel to re-drive a signal and output re-driven signal; a second channel having an input coupled to second port and an output coupled to first port, the second channel to re-drive a signal and output re-driven signal; and a controller to: enable first channel and disable second channel responsive to detecting a signal edge at first port; enable second channel and disable first channel responsive to detecting a signal edge at second port; sample impedance at first port if signal received at first port is de-asserted while first channel is enabled; and sample impedance at second port if signal received at second port is de-asserted while second channel is enabled.

    POWER CONSUMPTION REDUCTION IN USB REDRIVERS AND REPEATERS

    公开(公告)号:US20220137695A1

    公开(公告)日:2022-05-05

    申请号:US17577688

    申请日:2022-01-18

    Abstract: In an example, a data communication device includes one or more receivers, and one or more transmitters. The data communication device detects a start of frame packet (μSOF) on a data bus, wherein the μSOF indicates the start of a microframe; determines whether there are any data packets contained in the microframe during a first threshold period after the μSOF; and detects that there is no data packet contained in the microframe during the first threshold period after the μSOF, and in response, transitions at least one of the one or more transmitters from an active state to an OFF state, and transitions the at least one of the one or more transmitters from the OFF state to the active state prior to a switchback period before the end of the microframe.

    Power consumption reduction in USB 2.0 redriver and in eUSB2 repeater

    公开(公告)号:US11281284B2

    公开(公告)日:2022-03-22

    申请号:US16717836

    申请日:2019-12-17

    Abstract: A method includes detecting a micro start of frame packet (μSOF) on a data bus. If there is at least one data packet contained in a microframe during the first threshold period after the μSOF, transmitters are held in an active state. If there is no data packet in the first threshold period after the μSOF, the transmitters are transitioned from the active state to an OFF state. The method also includes transitioning the transmitters from the OFF state to the active state prior to a switchback period before the end of the microframe. The method also includes transitioning the transmitters from the OFF state to the active state if a data packet is received in the OFF state. The method also includes dropping the data packet received in the OFF state and transitioning from the OFF state to the active state when the data packet is dropped.

    DATA BUS SIGNAL CONDITIONER AND LEVEL SHIFTER

    公开(公告)号:US20210250026A1

    公开(公告)日:2021-08-12

    申请号:US17174119

    申请日:2021-02-11

    Abstract: A circuit includes signal conditioner circuitry, level shifter circuitry, and state detector and controller circuitry coupled between the signal conditioner circuitry and the level shifter circuitry. The state detector and controller circuitry includes receiver circuitry and a finite state machine coupled to the receiver circuitry. The finite state machine is configured to detect a first data rate from signals, control operation of the signal conditioner circuitry responsive to detecting the first data rate, and control operation of the level shifter circuitry during a second data rate.

    SERIAL BUS REPEATER WITH LOW POWER STATE DETECTION

    公开(公告)号:US20250021514A1

    公开(公告)日:2025-01-16

    申请号:US18903010

    申请日:2024-10-01

    Abstract: A serial bus repeater includes a port circuit and a low power state detection circuit. The port circuit is configured to communicate via a serial bus. The low power state detection circuit includes a power state transaction identification circuit and a bus state identification circuit. The power state transaction identification circuit is configured to identify a power state transaction on the serial bus. The power state transaction is indicative of entering a reduced power state. The bus state identification circuit is configured to identify a value of termination resistance on the serial bus that is indicative of entering the reduced power state.

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