公开(公告)号：US20220141495A1

公开(公告)日：2022-05-05

申请号：US17578381

申请日：2022-01-18

Applicant: WILUS INSTITUTE OF STANDARDS AND TECHNOLOGY INC. ,  HUMAX CO., LTD.

Inventor： Dongcheol KIM ,  Geonjung KO ,  Jaehong JUNG ,  Juhyung SON ,  Jinsam KWAK

IPC: H04N19/70 ,  H04N19/105 ,  H04N19/159 ,  H04N19/186 ,  H04N19/172

Abstract: A video signal decoding device comprises a processor which: decodes a general constraint information (GCI) syntax included in a bitstream of a video signal; and decodes the bitstream on the basis of the result of decoding the GCI syntax, wherein the GCI syntax includes a GCI syntax element for configuring the value of an SPS syntax element indicating whether it is possible to use a palette mode included in a sequence parameter set (SPS) raw byte sequence payload (RBSP) syntax.

公开(公告)号：US20220086429A1

公开(公告)日：2022-03-17

申请号：US17423853

申请日：2020-01-20

Applicant: WILUS INSTITUTE OF STANDARDS AND TECHNOLOGY INC. ,  HUMAX CO., LTD.

Inventor： Geonjung KO ,  Dongcheol KIM ,  Juhyung SON ,  Jaehong JUNG ,  Jinsam KWAK

IPC: H04N19/105 ,  H04N19/70 ,  H04N19/176 ,  H04N19/139 ,  H04N19/52

Abstract: Disclosed is a video signal processing method and device that encodes or decodes a video signal. In particular, the video signal processing method may comprise the steps of: parsing a first syntax element indicating whether a merge mode is applied to a current block; when the merge mode is applied to the current block, determining whether to parse a second syntax element on the basis of a first predefined condition, wherein the second syntax element indicates whether a first mode or a second mode is applied to the current block; when the first mode and the second mode are not applied to the current block, determining whether to parse a third syntax element on the basis of a second predefined condition; and determining a mode applied to the current block on the basis of the second syntax element or the third syntax element.

公开(公告)号：US20210377519A1

公开(公告)日：2021-12-02

申请号：US17401923

申请日：2021-08-13

Applicant: WILUS INSTITUTE OF STANDARDS AND TECHNOLOGY INC. ,  HUMAX CO., LTD.

Inventor： Dongcheol KIM ,  Geonjung KO ,  Jaehong JUNG ,  Juhyung SON ,  Jinsam KWAK

IPC: H04N19/105 ,  H04N19/119 ,  H04N19/176

Abstract: Disclosed are a video signal processing method and device whereby a video signal is encoded or decoded. The video signal processing method may comprise the steps of: determining whether an intra sub-partition (ISP) mode is applicable to a current block; if the ISP mode is applicable to the current block, splitting the current block into a plurality of rectangular transform blocks in the horizontal or vertical direction; generating prediction blocks of the transform blocks by carrying out intra prediction on each of the transform blocks; and reconstructing the current block on the basis of residual blocks of the transform blocks, and the prediction blocks.

公开(公告)号：US20210266527A1

公开(公告)日：2021-08-26

申请号：US17313987

申请日：2021-05-06

Applicant: WILUS INSTITUTE OF STANDARDS AND TECHNOLOGY INC. ,  HUMAX CO., LTD.

Inventor： Dongcheol KIM ,  Geonjung KO ,  Jaehong JUNG ,  Juhyung SON ,  Jinsam KWAK

IPC: H04N19/105 ,  H04N19/176

Abstract: A video signal processing method comprises the steps of: obtaining reference samples corresponding to a first side of a current block and reference samples corresponding to a second side of the current block, obtaining a direct current (DC) value for prediction of the current block based on a reference sample set comprising at least some of the reference samples corresponding to the first side and the reference samples corresponding to the second side, reconstructing the current block based on the DC value.

公开(公告)号：US20210112268A1

公开(公告)日：2021-04-15

申请号：US17113215

申请日：2020-12-07

Applicant: WILUS INSTITUTE OF STANDARDS AND TECHNOLOGY INC. ,  HUMAX CO., LTD.

Inventor： Geonjung KO ,  Dongcheol KIM ,  Juhyung SON ,  Jaehong JUNG ,  Jinsam KWAK

IPC: H04N19/513 ,  H04N19/53 ,  H04N19/57

Abstract: An apparatus for decoding a video signal, the apparatus comprising a processor, wherein the processor is configured to: configure a Motion Vector Prediction (MVP) candidate list for motion compensation of a current block through one of a first method and a second method, acquire a motion vector predictor of the current block, based on the configured MVP candidate list, acquire a motion vector differential value indicating a difference between a motion vector of the current block and the motion vector predictor, modify the motion vector differential value, based on a resolution of the motion vector differential value of the current block, acquire the motion vector of the current block, based on the motion vector predictor and the modified motion vector differential value, and reconstruct the current block, based on the acquired motion vector.

公开(公告)号：US20210037259A1

公开(公告)日：2021-02-04

申请号：US16758046

申请日：2018-10-24

Applicant: WILUS INSTITUTE OF STANDARDS AND TECHNOLOGY INC. ,  HUMAX CO., LTD.

Inventor： Geonjung KO ,  Dongcheol KIM ,  Juhyung SON ,  Jaehong JUNG ,  Jinsam KWAK

IPC: H04N19/593 ,  H04N19/11 ,  H04N19/176 ,  H04N19/136

Abstract: Disclosed are a video signal processing method and apparatus for encoding or decoding a video signal. In more detail, the video signal processing method includes receiving intra prediction mode information for a current block, wherein the intra prediction mode information indicates one of a plurality of intra prediction modes configuring an intra prediction mode set; and decoding the current block based on the received intra prediction mode information, wherein the intra prediction mode set comprises a plurality of angle modes, and the plurality of angle modes comprises a basic angle mode and an extended angle mode, wherein the extended angle mode is signaled based on the basic angle mode.

公开(公告)号：US20210014522A1

公开(公告)日：2021-01-14

申请号：US17033723

申请日：2020-09-26

Applicant: WILUS INSTITUTE OF STANDARDS AND TECHNOLOGY INC ,  HUMAX CO., LTD.

Inventor： Jaehong JUNG ,  Dongcheol KIM ,  Geonjung KO ,  Juhyung SON ,  Jinsam KWAK

IPC: H04N19/513 ,  H04N19/105 ,  H04N19/137 ,  H04N19/132 ,  H04N19/176

Abstract: Disclosed is a video signal processing method comprising the steps of: acquiring a merge index which indicates a candidate for prediction of a current block among a plurality of candidates for the prediction of the current block, which are included in a merge candidate list; acquiring motion information of the current block on the basis of motion information corresponding to the candidate indicated by the merge index; when the motion information of the current block includes a plurality of motion vectors corresponding to a list of different reference pictures, comparing picture order count (POC) differences between each of the reference pictures corresponding to the plurality of motion vectors and the current picture including the current block; correcting the plurality of motion vectors on the basis of a result of the comparison; and reconstructing the current block on the basis of the plurality of corrected motion vectors.

公开(公告)号：US20250106388A1

公开(公告)日：2025-03-27

申请号：US18975816

申请日：2024-12-10

Applicant: WILUS INSTITUTE OF STANDARDS AND TECHNOLOGY INC.

Inventor： Geonjung KO ,  Dongcheol KIM ,  Juhyung SON ,  Jaehong JUNG ,  Jinsam KWAK

IPC: H04N19/105 ,  H04N19/139 ,  H04N19/176 ,  H04N19/52 ,  H04N19/70

Abstract: Disclosed is a video signal processing method and device that encodes or decodes a video signal. In particular, the video signal processing method may comprise the steps of: parsing a first syntax element indicating whether a merge mode is applied to a current block; when the merge mode is applied to the current block, determining whether to parse a second syntax element on the basis of a first predefined condition, wherein the second syntax element indicates whether a first mode or a second mode is applied to the current block; when the first mode and the second mode are not applied to the current block, determining whether to parse a third syntax element on the basis of a second predefined condition; and determining a mode applied to the current block on the basis of the second syntax element or the third syntax element.

公开(公告)号：US20240406435A1

公开(公告)日：2024-12-05

申请号：US18799761

申请日：2024-08-09

Applicant: WILUS INSTITUTE OF STANDARDS AND TECHNOLOGY INC.

Inventor： Geonjung KO ,  Dongcheol KIM ,  Juhyung SON ,  Jaehong JUNG ,  Jinsam KWAK

IPC: H04N19/513 ,  H04N19/53 ,  H04N19/57

Abstract: A video signal decoding device comprising a processor, wherein the processor is configured to: obtain reference samples corresponding to a first side of a current block and reference samples corresponding to a second side of the current block, obtain a direct current (DC) value for prediction of the current block based on a reference sample set comprising at least some of the reference samples corresponding to the first side and the reference samples corresponding to the second side, and reconstruct the current block based on the DC value.

公开(公告)号：US20240348815A1

公开(公告)日：2024-10-17

申请号：US18755594

申请日：2024-06-26

Applicant: WILUS INSTITUTE OF STANDARDS AND TECHNOLOGY INC.

Inventor： Geonjung KO ,  Dongcheol KIM ,  Juhyung SON ,  Jaehong JUNG ,  Jinsam KWAK

IPC: H04N19/46 ,  H04N19/105 ,  H04N19/137 ,  H04N19/159 ,  H04N19/176

CPC classification number: H04N19/46 ,  H04N19/105 ,  H04N19/137 ,  H04N19/159 ,  H04N19/176

Abstract: The present disclosure relates to a method and apparatus for processing a video signal and, more specifically, comprises the steps of: parsing, from a bitstream, an adaptive motion vector resolution (AMVR) enabled flag (sps_amvr_enabled_flag) indicating whether or not adaptive motion vector differential resolution is used; parsing, from the bitstream, an affine enabled flag (sps_affine_enabled_flag) indicating whether or not affine motion compensation is usable; on the basis of the affine enabled flag, determining whether or not the affine motion compensation is usable; when the affine motion compensation is usable, determining, on the basis of the AMVR enabled flag, whether or not the adaptive motion vector differential resolution is used; and, when the adaptive motion vector differential resolution is used, parsing, from the bitstream, an affine AMVR enabled flag (sps_affine_amvr_enabled flag) indicating whether or not the adaptive motion vector differential resolution is usable for the affine motion compensation.