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    Tunable oscillator with noise degeneration
    21.
    发明公开
    Tunable oscillator with noise degeneration 失效
    Abstimmbarer Oszillator mit herabgesetztem Rauschen。

    公开(公告)号：EP0462747A1

    公开(公告)日：1991-12-27

    申请号：EP91305287.4

    申请日：1991-06-12

    Applicant: RAYTHEON COMPANY

    Inventor： Galani, Zvi ,  Waterman, Raymond C., Jr. ,  Bianchini, Michael J.

    IPC: H03L7/04 ,  H03B5/18

    CPC classification number: H03B9/142 ,  H03B5/1841 ,  H03B5/1882 ,  H03B2009/126 ,  H03B2200/0088 ,  H03B2200/009 ,  H03B2201/0241 ,  H03B2201/033 ,  H03B2202/076

    Abstract: An oscillator (10) providing predictable oscillator modulation sensitivity includes an amplifier (11) and a feedback circuit (29) disposed about the amplifier (11). The feedback circuit (11) includes a resonator (13) having a first port and a second port, and a voltage-controlled phase shifter (27) having an input port, an output port and a control port (27a), the input port of the voltage-controlled phase shifter (27) being connected to the output port of the amplifier (11) and the output port of the voltage-controlled phase shifter (27) being coupled to a port of the resonator (13). The oscillator (10) further includes a circuit (30), responsive to signals from the output of the voltage-controlled phase shifter (27) and the first port of the resonator (13), to provide a control signal (25a) to the control port (27a) of the voltage-controlled phase shifter (27) for degenerating low frequency FM noise arising within the amplifier (10).

    Abstract translation: 提供可预测振荡器调制灵敏度的振荡器（10）包括设置在放大器（11）周围的放大器（11）和反馈电路（29）。 反馈电路（11）包括具有第一端口和第二端口的谐振器（13）和具有输入端口，输出端口和控制端口（27a）的电压控制移相器（27），输入端口 连接到放大器（11）的输出端口并且电压控制移相器（27）的输出端口耦合到谐振器（13）的端口的电压控制移相器（27）。 振荡器（10）还包括响应于来自电压控制移相器（27）的输出和谐振器（13）的第一端口的信号的电路（30），以向控制信号（25a）提供控制信号 电压控制移相器（27）的控制端口（27a）用于退化在放大器（10）内产生的低频FM噪声。

    A phase locked loop circuit
    24.
    发明公开
    A phase locked loop circuit 失效
    锁相环电路

    公开(公告)号：EP0583804A1

    公开(公告)日：1994-02-23

    申请号：EP93117197.9

    申请日：1990-08-24

    Applicant: ANRITSU CORPORATION

    Inventor： Saeki, Hiroshi, Anritsu Okihara-Ryou ,  Motoyama, Hatsuo

    IPC: H03L7/093 ,  H03L7/113 ,  H03B21/01

    CPC classification number: H03B19/16 ,  H03B5/1203 ,  H03B5/1231 ,  H03B5/1243 ,  H03B5/1262 ,  H03B5/1293 ,  H03B19/20 ,  H03B21/01 ,  H03B2200/0034 ,  H03B2200/0042 ,  H03B2201/0208 ,  H03B2201/0216 ,  H03B2201/033 ,  H03L7/093 ,  H03L7/113

    Abstract: A phase locked loop circuit is provided comprising a voltage controlled oscillator (221) capable of outputting a variable oscillation frequency signal. A phase detector (222) compares the output signal of the voltage control oscillator (221) with a reference signal and outputs an error signal. An integrator (223) integrates the error signal and extracts a direct current variable component which is fed by a loop filter (224) from the integrator (223) to the voltage controlled oscillator (221) as a control signal. An alternate current coupling circuit (230) is provided for adding only an alternate current component contained in the output error signal to the control signal for feeding same to the voltage controlled oscillator (221). A compensating circuit (231) is inserted in the signal path of the alternate current coupling circuit (230), the compensating circuit (231) having a cut-off frequency exceeding the cut-off frequency of the integrator (223).

    Abstract translation: 提供一种锁相环电路，其包括能够输出可变振荡频率信号的压控振荡器（221）。 相位检测器（222）将压控振荡器（221）的输出信号与参考信号进行比较并输出误差信号。 积分器（223）对误差信号进行积分并提取由积分器（223）的环路滤波器（224）馈送到电压控制振荡器（221）的直流电流可变分量作为控制信号。 提供交流耦合电路（230），用于仅将包含在输出误差信号中的交流分量加到控制信号上，以将其馈送到压控振荡器（221）。 补偿电路（231）插入交流耦合电路（230）的信号路径中，补偿电路（231）的截止频率超过积分器（223）的截止频率。

    A phase locked loop circuit including a frequency detection function
    25.
    发明公开
    A phase locked loop circuit including a frequency detection function 失效
    用频率检测锁相环电路装置。

    公开(公告)号：EP0583801A1

    公开(公告)日：1994-02-23

    申请号：EP93117172.2

    申请日：1990-08-24

    Applicant: ANRITSU CORPORATION

    Inventor： Saeki, Hiroshi, Anritsu Okihara-Ryou ,  Motoyama, Hatsuo

    IPC: H03L7/113 ,  H03B21/01

    CPC classification number: H03B19/16 ,  H03B5/1203 ,  H03B5/1231 ,  H03B5/1243 ,  H03B5/1262 ,  H03B5/1293 ,  H03B19/20 ,  H03B21/01 ,  H03B2200/0034 ,  H03B2200/0042 ,  H03B2201/0208 ,  H03B2201/0216 ,  H03B2201/033 ,  H03L7/093 ,  H03L7/113

    Abstract: A phase locked loop circuit is provided comprising a voltage controlled oscillator (17) and a phase detector (15) for detecting a phase difference and outputting a corresponding error voltage. A loop filter (16) integrates the error voltage and controls the voltage controlled oscillator (17). A first frequency comparator (23) is provided for dividing the frequency of the output signal of the voltage controlled oscillator (17) according to an upper limit frequency supplied by a control section (27). The comparator (23) compares frequencies of a reference signal and the frequency-divided signal and outputs down-pulses when the frequency of the frequency-divided signal is higher than that of the reference signal. Similarly, a second frequency comparator (24) divides and compares the output signal of the voltage controlled oscillator (17) with a second reference signal and outputs an up-pulse when the frequency of the divided signal is lower than the second reference signal. Further provided is an up-down processor (25) for supplying the up-pulses and the down-pulses to the loop filter (16) to add to the error voltage from the phase detector (15).

    Frequency synthesizer for implementing generator of highly pure signals and circuit devices, such as VCO, PLL and SG, used therein
    26.
    发明公开
    Frequency synthesizer for implementing generator of highly pure signals and circuit devices, such as VCO, PLL and SG, used therein 失效
    用于实现高纯度信号和电路设备的发生器的频率合成器，如VCO，PLL和SG，使用的

    公开(公告)号：EP0414260A3

    公开(公告)日：1992-08-26

    申请号：EP90116261.0

    申请日：1990-08-24

    Applicant: ANRITSU CORPORATION

    Inventor： Saeki Anritsu Okihara-Ryou, Hiroshi ,  Motoyama, Hatsuo

    IPC: H03B21/01 ,  H03L7/087 ,  H03L7/099 ,  H03B19/16

    CPC classification number: H03B19/16 ,  H03B5/1203 ,  H03B5/1231 ,  H03B5/1243 ,  H03B5/1262 ,  H03B5/1293 ,  H03B19/20 ,  H03B21/01 ,  H03B2200/0034 ,  H03B2200/0042 ,  H03B2201/0208 ,  H03B2201/0216 ,  H03B2201/033 ,  H03L7/093 ,  H03L7/113

    Abstract: To output desired high purity signals, a frequency synthesizer was made to synthesize reference signals from a first and second signal generators (11, 12) in the same frequency band as a desired frequency band. Thereby, the resolution of the frequency synthesizer becomes twice the step ΔF. Also, the frequency synthe­sizer can interpolate the step size of the first signal generator with half the number of steps. While, heretofore, the 100-MHz step size was interpolated with Fq = 0, 10, 20, 30, 40 and 50 MHz, Fq = 0, 20, 40 MHz interpolation is made possible. This permits the syn­thesis of 580 MHz to 1280 MHz. In this case, however, the minimum difference between the sum and difference frequencies from the first and second signal generators (11, 12) is 40 MHz and the lowest frequency is 20 MHz. Thus, depending on mixer isolation, the spurious meas­ures become difficult. The frequency synthesizer of the present invention pays attention to the fact that 20 MHz step signals can be synthesized at frequencies which are integral multiples of Fq (multiples of 0 and 5 are excluded). When two-fold Fq is used, the minimum dif­ference between the sum and difference frequencies out­put from a mixer (13) is 80 MHz and the lowest used frequency is 40 MHz. The spurious measures by a PLL circuit (14) becomes easy. A frequency detector (18) forces the free-running frequency of a VCO included the PLL circuit. Control Data P and Q to the first and sec­ond signal generators are supplied from a control sec­tion (27) based on data Fi set by as frequency setting section (28).

    VOLTAGE CONTROLLED OSCILLATOR
    27.
    发明授权
    VOLTAGE CONTROLLED OSCILLATOR 有权
    压控振荡器

    公开(公告)号：EP1072087B1

    公开(公告)日：2003-09-03

    申请号：EP99920688.1

    申请日：1999-04-15

    Applicant: MOTOROLA GmbH

    Inventor： LICHTERFELD, Stefan

    IPC: H03B5/12

    CPC classification number: H03C3/222 ,  H03B5/1203 ,  H03B5/1231 ,  H03B5/1243 ,  H03B2200/0008 ,  H03B2200/004 ,  H03B2201/0208 ,  H03B2201/031 ,  H03B2201/033

    Abstract: A voltage controlled oscillator based on the Colpitt's design is provided. An inductor (Lc) is provided in parallel to one (Cs) of a pair of series connected capacitors (Cs, Cd). The present of the inductor (Lc) modifies the impedance ratio of the pair of series connected capacitors (Cs, Cd) by introducing a frequency dependence. This frequency dependence mitigates frequency dependent losses in a tuned circuit (Lr, Ct) in the voltage controlled oscillator. The invention provides an enhanced output signal over the frequency range of operation of the voltage controlled oscillator. The invention also improves the modulation of the voltage controlled oscillator's output signal which can be achieved by a separate modulation circuit (Cm, Rm, Vm).

    VOLTAGE CONTROLLED OSCILLATOR
    28.
    发明公开
    VOLTAGE CONTROLLED OSCILLATOR 有权
    压控振荡器

    公开(公告)号：EP1072087A1

    公开(公告)日：2001-01-31

    申请号：EP99920688.1

    申请日：1999-04-15

    Applicant: MOTOROLA GmbH

    Inventor： LICHTERFELD, Stefan

    IPC: H03B5/12

    CPC classification number: H03C3/222 ,  H03B5/1203 ,  H03B5/1231 ,  H03B5/1243 ,  H03B2200/0008 ,  H03B2200/004 ,  H03B2201/0208 ,  H03B2201/031 ,  H03B2201/033

    Abstract: A voltage controlled oscillator based on the Colpitt's design is provided. An inductor (Lc) is provided in parallel to one (Cs) of a pair of series connected capacitors (Cs, Cd). The present of the inductor (Lc) modifies the impedance ratio of the pair of series connected capacitors (Cs, Cd) by introducing a frequency dependence. This frequency dependence mitigates frequency dependent losses in a tuned circuit (Lr, Ct) in the voltage controlled oscillator. The invention provides an enhanced output signal over the frequency range of operation of the voltage controlled oscillator. The invention also improves the modulation of the voltage controlled oscillator's output signal which can be achieved by a separate modulation circuit (Cm, Rm, Vm).

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