公开(公告)号：US10532379B2

公开(公告)日：2020-01-14

申请号：US15515856

申请日：2015-09-30

Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES ,  STMicroelectronics (Crolles 2) SAS ,  UNIVERSITE GRENOBLE ALPES

Inventor： Fabrice Casset ,  Skandar Basrour ,  Cédrick Chappaz ,  Jean-Sébastien Danel

IPC: H01L41/09 ,  B06B3/00 ,  B81B3/00 ,  B06B1/04 ,  B06B1/06 ,  H01L41/18 ,  H01L41/25

Abstract: A mechanical structure comprising a stack including an active substrate and at least one actuator designed to generate vibrations at the active substrate, the stack comprises an elementary structure for amplifying the vibrations: positioned between the actuator and the active substrate, the structure designed to transmit and amplify the vibrations; and comprising at least one trench, located between the actuator and the active substrate. A method for manufacturing the structure comprising the use of a temporary substrate is provided.

公开(公告)号：US20200013812A1

公开(公告)日：2020-01-09

申请号：US16451856

申请日：2019-06-25

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Axel Crocherie ,  Denis Rideau

IPC: H01L27/146 ,  H04N5/341

Abstract: A multispectral image sensor includes a semiconductor layer and a number of pixels formed inside and on top of the semiconductor layer. The pixels include a first pixel of a first type formed inside and on top of a first portion of the semiconductor layer and a second pixel of a second type formed inside and on top of a second portion of the semiconductor layer. The first pixel has a first thickness that defines a vertical cavity resonating at a first wavelength and the second pixel has a second thickness different from the first thickness. The second thickness defines a vertical cavity resonating at a second wavelength different than the first wavelength.

公开(公告)号：US20190393207A1

公开(公告)日：2019-12-26

申请号：US16562963

申请日：2019-09-06

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Alexandre AYRES ,  Bertrand BOROT

IPC: H01L27/02 ,  H01L23/522 ,  H01L23/528 ,  H01L23/532 ,  H01L27/088

Abstract: A three-dimensional integrated structure is formed by a first substrate with first components oriented in a first direction and a second substrate with second components oriented in a second direction. An interconnection level includes electrically conducting tracks that run in a third direction. One of the second direction and third direction forms a non-right and non-zero angle with the first direction. An electrical link formed by at least one of the electrically conducting tracks electrically connected two points of the first or of the second components.

公开(公告)号：US20190339551A1

公开(公告)日：2019-11-07

申请号：US16401956

申请日：2019-05-02

Applicant: STMicroelectronics (Crolles 2) SAS ,  Commissariat a l'Energie Atomique et aux Energies Alternatives

Inventor： Patrick Le Maitre ,  Nicolas Michit ,  Jean-Francois Carpentier ,  Benoit Charbonnier

IPC: G02F1/025 ,  G01R19/30

Abstract: A device, includes: a ring waveguide; a diode comprising a junction extending at least partly in the ring waveguide; and a first circuit configured to supply a signal representative of a leakage current in the diode.

公开(公告)号：US10469058B1

公开(公告)日：2019-11-05

申请号：US15990944

申请日：2018-05-29

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Guenole Lallement ,  Fady Abouzeid

IPC: H03K3/013 ,  H03K3/012 ,  H03K3/03

Abstract: A multi-stage ring oscillator generates an output clock signal having a frequency which is dependent on a digitally leakage current that is applied to each stage of the multi-stage ring oscillator. A magnitude of a leakage current sourced by each digitally controlled leakage current source is set by a control circuit in response to a selection signal. A calibration circuit processes a reference clock signal and the output clock signal generated by the multi-stage ring oscillator to make adjustment to the selection signal which drives a locking of a frequency of the output clock signal to a desired frequency.

公开(公告)号：US10451670B2

公开(公告)日：2019-10-22

申请号：US15378663

申请日：2016-12-14

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Sylvain Clerc

IPC: G01R31/28 ,  G01R31/30 ,  G01R31/317 ,  H03K5/133 ,  H03K19/003

Abstract: A device for monitoring a critical path of an integrated circuit includes a replica of the critical path formed by sequential elements mutually separated by delay circuits that are programmable though a corresponding main multiplexer. A control circuit controls delay selections made by each main multiplexer. A sequencing module operates to sequence each sequential element using a main clock signal by delivering, in response to a main clock signal, respectively to the sequential elements, secondary clock signals that are mutually time shifted in such a manner as to take into account the propagation time inherent to the main multiplexer.

公开(公告)号：US10447230B2

公开(公告)日：2019-10-15

申请号：US15653014

申请日：2017-07-18

Applicant: STMicroelectronics (Crolles 2) SAS ,  STMicroelectronics S.A.

Inventor： Frédéric Gianesello ,  Romain Pilard ,  Cédric Durand

IPC: H01F27/28 ,  H03H7/42 ,  H01F27/38 ,  H01L23/522 ,  H01F27/29 ,  H01F27/40 ,  H04W88/02

Abstract: A transformer of the balanced-unbalanced type includes a primary inductive circuit and a secondary inductive circuit housed inside an additional inductive winding connected in parallel to the terminals of the secondary circuit and inductively coupled with the primary circuit and the secondary circuit.

公开(公告)号：US10446535B2

公开(公告)日：2019-10-15

申请号：US15137201

申请日：2016-04-25

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Alexandre Ayres ,  Bertrand Borot

IPC: H01L23/48 ,  H01L27/02 ,  G06F17/50 ,  H01L23/522 ,  H01L23/528 ,  H01L23/532 ,  H01L27/088

Abstract: A three-dimensional integrated structure is formed by a first substrate with first components oriented in a first direction and a second substrate with second components oriented in a second direction. An interconnection level includes electrically conducting tracks that run in a third direction. One of the second direction and third direction forms a non-right and non-zero angle with the first direction. An electrical link formed by at least one of the electrically conducting tracks electrically connected two points of the first or of the second components.

公开(公告)号：US20190312170A1

公开(公告)日：2019-10-10

申请号：US16222542

申请日：2018-12-17

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Francois ROY

IPC: H01L31/113 ,  H01L27/146 ,  H01L31/0224

Abstract: A semiconductor substrate doped with a first doping type is positioned adjacent an insulated gate electrode that is biased by a gate voltage. A first region within the semiconductor substrate is doped with the first doping type and biased with a bias voltage. A second region within the semiconductor substrate is doped with a second doping type that is opposite the first doping type. Voltage application produces an electrostatic field within the semiconductor substrate causing the formation of a fully depleted region within the semiconductor substrate. The fully depleted region responds to absorption of a photon with an avalanche multiplication that produces charges that are collected at the first and second regions.

公开(公告)号：US10418486B2

公开(公告)日：2019-09-17

申请号：US15976452

申请日：2018-05-10

Applicant: STMicroelectronics (Crolles 2) SAS ,  Commissariat A L'Energie Atomique et aux Energies Alternatives

Inventor： Remy Berthelon ,  Francois Andrieu

IPC: H01L29/78 ,  H01L21/8238 ,  H01L21/84 ,  H01L27/02 ,  H01L27/12 ,  H01L27/092 ,  H01L21/762 ,  H01L29/786

Abstract: Longitudinal trenches extend between and on either side of first and second side-by-side strips. Transverse trenches extend from one edge to another edge of the first strip to define tensilely strained semiconductor slabs in the first strip, with the second strip including portions that are compressively strained in the longitudinal direction and/or tensilely strained in the transverse direction. In the first strip, N-channel MOS transistors are located inside and on top of the semiconductor slabs. In the second strip, P-channel MOS transistors are located inside and on top of the portions.