公开(公告)号：WO2014158177A1

公开(公告)日：2014-10-02

申请号：PCT/US2013/034491

申请日：2013-03-28

Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.

Inventor： LESARTRE, Gregg, B. ,  WHEELER, Andrew, R. ,  HERRELL, Russ, W.

IPC: G06F13/14 ,  G06F13/38

CPC classification number: G06F12/0692 ,  G06F3/061 ,  G06F3/0664 ,  G06F3/0683 ,  G06F12/0284 ,  G06F12/10 ,  G06F12/1036 ,  G06F12/1072

Abstract: A method for sending data from a local memory device in a first computing device to an external memory device in a second computing device is described herein. In one example, a method includes configuring the local memory device to store data for the external memory device and detecting a request for data from the external memory device. The method also includes translating a memory address that corresponds to the requested data from an external memory address to a local memory address. Additionally, the method includes retrieving the requested data based on the local memory address and sending the requested data to the second computing device.

Abstract translation: 这里描述了一种从第一计算设备中的本地存储设备向第二计算设备中的外部存储设备发送数据的方法。 在一个示例中，一种方法包括配置本地存储器设备以存储用于外部存储器设备的数据并检测来自外部存储器设备的数据请求。 该方法还包括将对应于所请求的数据的存储器地址从外部存储器地址翻译成本地存储器地址。 另外，该方法包括基于本地存储器地址检索所请求的数据，并将所请求的数据发送到第二计算设备。

公开(公告)号：WO2014150621A1

公开(公告)日：2014-09-25

申请号：PCT/US2014/023814

申请日：2014-03-11

Applicant: BRACKET COMPUTING, INC.

Inventor： LANGO, Jason, A. ,  EDWARDS, John, K.

IPC: G06F3/06

CPC classification number: G06F3/061 ,  G06F3/0605 ,  G06F3/0614 ,  G06F3/0628 ,  G06F3/0634 ,  G06F3/0649 ,  G06F3/0653 ,  G06F3/0683 ,  G06F3/0685 ,  G06F9/45533 ,  G06F12/1036

Abstract: Performance information for storage units located at a virtual data center is determined by executing storage administrator logic whose execution is controlled by a management entity different than the virtual data center provider. Performance expectations are automatically determined based on the determined performance information. In response to determining that a particular storage unit is incompatible with performance expectations applicable to the particular storage unit, embodiments cause a reduction in utilization of the particular storage unit. Based on determined performance information, another embodiment determines that a performance pattern indicating a physical co-location of a first storage unit and a second storage unit has occurred. In response to determining that the performance pattern indicating a physical co-location of a first storage unit and a second storage unit has occurred, the embodiment disables use of a selected storage unit of the first storage unit or the second storage unit for at least a particular purpose.

Abstract translation: 通过执行由不同于虚拟数据中心提供商的管理实体控制其执行的存储管理员逻辑来确定位于虚拟数据中心的存储单元的性能信息。 性能预期将根据确定的绩效信息自动确定。 响应于确定特定存储单元与适用于特定存储单元的性能期望不兼容，实施例导致特定存储单元的利用率降低。 基于确定的性能信息，另一实施例确定指示第一存储单元和第二存储单元的物理共位置的性能模式已经发生。 响应于确定指示第一存储单元和第二存储单元的物理共位置的性能模式已经发生，本实施例禁止使用第一存储单元或第二存储单元的选定存储单元至少一个 特殊用途。

公开(公告)号：WO2014058817A1

公开(公告)日：2014-04-17

申请号：PCT/US2013/063779

申请日：2013-10-08

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： BYBELL, Anthony, J. ,  DUKRO, David, D. ,  FREY, Bradly, G. ,  GSCHWIND, Michael, K.

IPC: G06F12/10 ,  G06F9/44

CPC classification number: G06F12/1027 ,  G06F12/1009 ,  G06F12/1018 ,  G06F12/1036 ,  G06F2212/151

Abstract: An address translation capability is provided in which translation structures of different types are used to translate memory addresses from one format to another format (810, 819, 840). Multiple translation structure formats (e.g., multiple page table formats, such as hash page tables and hierarchical page tables) are concurrently supported in a system configuration (702, 704). This facilitates provision of guest access in virtualized operating systems, and/or the mixing of translation formats to better match the data access patterns being translated.

Abstract translation: 提供地址转换能力，其中使用不同类型的翻译结构将存储器地址从一种格式转换为另一格式（810,819,840）。 在系统配置（702,704）中同时支持多种翻译结构格式（例如，多页表格式，诸如散列页表和分层页表）。 这有助于在虚拟操作系统中提供访客访问，和/或翻译格式的混合以更好地匹配被翻译的数据访问模式。

公开(公告)号：WO2014028120A1

公开(公告)日：2014-02-20

申请号：PCT/US2013/046504

申请日：2013-06-19

Applicant: INTEL CORPORATION ,  RAO, Jayanth, N. ,  SILVAS, Ronald, W. ,  SHAH, Ankur, N.

Inventor： RAO, Jayanth, N. ,  SILVAS, Ronald, W. ,  SHAH, Ankur, N.

IPC: G06F13/14 ,  G06F9/46 ,  G06F15/167

CPC classification number: G06T1/60 ,  G06F12/0223 ,  G06F12/084 ,  G06F12/1009 ,  G06F12/1036 ,  G06F12/109 ,  G06F12/126 ,  G06F2212/302 ,  G06F2212/62 ,  G06F2212/656 ,  G06F2212/657 ,  G06T1/20 ,  G06T11/60 ,  Y02D10/13

Abstract: A method and system for shared virtual memory between a central processing unit (CPU) and a graphics processing unit (GPU) of a computing device are disclosed herein. The method includes allocating a surface within a system memory. A CPU virtual address space may be created, and the surface may be mapped to the CPU virtual address space within a CPU page table. The method also includes creating a GPU virtual address space equivalent to the CPU virtual address space, mapping the surface to the GPU virtual address space within a GPU page table, and pinning the surface.

Abstract translation: 本文公开了一种用于计算设备的中央处理单元（CPU）和图形处理单元（GPU）之间的共享虚拟存储器的方法和系统。 该方法包括在系统存储器内分配表面。 可以创建CPU虚拟地址空间，并且可以将表面映射到CPU页表中的CPU虚拟地址空间。 该方法还包括创建等效于CPU虚拟地址空间的GPU虚拟地址空间，将表面映射到GPU页表中的GPU虚拟地址空间，并固定表面。

公开(公告)号：WO2013186646A1

公开(公告)日：2013-12-19

申请号：PCT/IB2013/054164

申请日：2013-05-21

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ,  IBM UNITED KINGDOM LIMITED ,  IBM (CHINA) INVESTMENT COMPANY LIMITED

Inventor： BYBELL, Anthony, Joseph ,  GSCHWIND, Michael, Karl

IPC: G06F13/00 ,  G06F12/02

CPC classification number: G06F12/1009 ,  G06F12/1018 ,  G06F12/1027 ,  G06F12/1036

Abstract: A method includes receiving a request to access a desired block of memory. The request includes an effective address that includes an effective segment identifier (ESID) and a linear address, the linear address comprising a most significant portion and a byte index. Locating an entry, in a buffer, the entry including the ESID of the effective address. Based on the entry including a radix page table pointer (RPTP), performing, using the RPTP to locate a translation table of a hierarchy of translation tables, using the located translation table to translate the most significant portion of the linear address to obtain an address of a block of memory, and based on the obtained address, performing the requested access to the desired block of memory.

Abstract translation: 一种方法包括接收访问期望的存储块的请求。 该请求包括有效地址，其包括有效段标识符（ESID）和线性地址，线性地址包括最高有效部分和字节索引。 在缓冲区中查找包含有效地址的ESID的条目。 基于包括基数表指针（RPTP）的条目，使用RPTP来执行翻译表的层次结构的翻译表，使用定位的转换表来翻译线性地址的最重要部分以获得地址 的存储器块，并且基于获得的地址，执行对期望的存储器块的所请求的访问。

公开(公告)号：WO2013143784A1

公开(公告)日：2013-10-03

申请号：PCT/EP2013/053287

申请日：2013-02-19

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ,  IBM UNITED KINGDOM LIMITED

Inventor： GSCHWIND, Michael, Karl ,  BYBELL, Anthony, Joseph

IPC: G06F12/10

CPC classification number: G06F12/1027 ,  G06F12/0292 ,  G06F12/1018 ,  G06F12/1036 ,  G06F2212/1016 ,  G06F2212/651 ,  G06F2212/684

Abstract: Embodiments of the invention relate to hybrid address translation. An aspect of the invention includes receiving a first address, the first address referencing a location in a first address space. The computer searches a segment lookaside buffer (SLB) for a SLB entry corresponding to the first address; the SLB entry comprising a type field and an address field and determines whether a value of the type field in the SLB entry indicates a hashed page table (HPT) search or a radix tree search. Based on determining that the value of the type field indicates the HPT search, a HPT is searched to determine a second address, the second address comprising a translation of the first address into a second address space; and based on determining that the value of the type field indicates the radix tree search, a radix tree is searched to determine the second address.

Abstract translation: 本发明的实施例涉及混合地址转换。 本发明的一个方面包括接收第一地址，第一地址引用第一地址空间中的位置。 计算机搜索段后备缓冲器（SLB）用于对应于第一地址的SLB条目; SLB条目包括类型字段和地址字段，并且确定SLB条目中的类型字段的值是否指示散列页表（HPT）搜索或基数树搜索。 基于确定类型字段的值指示HPT搜索，搜索HPT以确定第二地址，第二地址包括将第一地址转换为第二地址空间; 并且基于确定类型字段的值指示基数树搜索，搜索基数树以确定第二地址。

公开(公告)号：WO2012103367A3

公开(公告)日：2012-11-15

申请号：PCT/US2012022773

申请日：2012-01-26

Applicant: SOFT MACHINES INC ,  ABDALLAH MOHAMMAD

Inventor： ABDALLAH MOHAMMAD

IPC: G06F12/08 ,  G06F9/06 ,  G06F12/10

CPC classification number: G06F9/355 ,  G06F9/30054 ,  G06F9/30174 ,  G06F9/322 ,  G06F9/3802 ,  G06F9/4552 ,  G06F12/0895 ,  G06F12/0897 ,  G06F12/1036 ,  G06F2212/604

Abstract: A method for managing mappings of storage on a code cache for a processor. The method includes storing a plurality of guest address to native address mappings as entries in a conversion look aside buffer, wherein the entries indicate guest addresses that have corresponding converted native addresses stored within a code cache memory, and receiving a subsequent request for a guest address at the conversion look aside buffer. The conversion look aside buffer is indexed to determine whether there exists an entry that corresponds to the index, wherein the index comprises a tag and an offset that is used to identify the entry that corresponds to the index. Upon a hit on the tag, the corresponding entry is accessed to retrieve a pointer to the code cache memory corresponding block of converted native instructions. The corresponding block of converted native instructions are fetched from the code cache memory for execution.

Abstract translation: 一种用于管理用于处理器的代码高速缓存上的存储的映射的方法。 该方法包括将多个访客地址存储到本地地址映射中作为转换旁边缓冲区中的条目，其中条目指示具有存储在代码高速缓冲存储器中的相应转换的本地地址的访客地址，以及接收对访客地址的后续请求 在转换看看缓冲区。 将缓冲器的转换看起来被索引以确定是否存在对应于索引的条目，其中索引包括用于标识对应于索引的条目的标签和偏移。 在标签上点击时，访问相应的条目以检索指向转换的本地指令的代码高速缓冲存储器相应块的指针。 转换的本地指令的相应块从代码高速缓冲存储器中取出以供执行。

公开(公告)号：WO2012125202A1

公开(公告)日：2012-09-20

申请号：PCT/US2011/067968

申请日：2011-12-29

Applicant: INTEL CORPORATION ,  GINZBURG, Boris ,  NATANZON, Esfir ,  OSADCHIY, Ilya ,  RONEN, Ronny ,  WEISSMANN, Eliezer ,  ZACH, Yoav ,  FARRELL, Robert L.

Inventor： GINZBURG, Boris ,  NATANZON, Esfir ,  OSADCHIY, Ilya ,  RONEN, Ronny ,  WEISSMANN, Eliezer ,  ZACH, Yoav ,  FARRELL, Robert L.

IPC: G06F9/06 ,  G06F9/30 ,  G06F13/14 ,  G06F12/08

CPC classification number: G06F12/1027 ,  G06F12/1036 ,  G06F12/109 ,  G06F2212/302 ,  G06F2212/682

Abstract: Page faults arising in a graphics processing unit may be handled by an operating system running on the central processing unit. In some embodiments, this means that unpinned memory can be used for the graphics processing unit. Using unpinned memory in the graphics processing unit may expand the capabilities of the graphics processing unit in some cases.

Abstract translation: 在图形处理单元中出现的页面错误可以由在中央处理单元上运行的操作系统来处理。 在一些实施例中，这意味着未被固定的存储器可以用于图形处理单元。 在图形处理单元中使用未固定的存储器可以在某些情况下扩展图形处理单元的能力。

公开(公告)号：WO2011086473A3

公开(公告)日：2011-10-13

申请号：PCT/IB2011000271

申请日：2011-01-13

Applicant: MARVELL ISRAEL MISL LTD ,  KARDASHOV TIMOR ,  KOVALENKO MAXIM ,  ELIAS ARIE ,  RAY GUY

Inventor： KARDASHOV TIMOR ,  KOVALENKO MAXIM ,  ELIAS ARIE ,  RAY GUY

IPC: G06F9/50

CPC classification number: G06F9/48 ,  G06F9/455 ,  G06F9/461 ,  G06F9/4881 ,  G06F9/50 ,  G06F9/5027 ,  G06F9/5077 ,  G06F12/1036 ,  G06F12/109 ,  G06F13/26

Abstract: Methods and systems for implementing virtual processors are disclosed. For example, in an embodiment a processing apparatus configured to act as a plurality of virtual processors includes a first virtual program space that includes a first program execution memory, the first program execution memory including code to run a non-real-time operating system capable of supporting a one or more non-real-time applications, a second virtual program space that includes a second program execution memory, the second program execution memory including code to run one or more real-time processes, and a central processing unit (CPU) configured to operate in a first operating mode and a second operating mode, the CPU being configured to perform operating system and application activities using the first virtual program space for the first operating mode without using the second virtual program space and without appreciably interfering with the one or more real-time processes that are running in the second operating mode.

Abstract translation: 公开了用于实现虚拟处理器的方法和系统。 例如，在一个实施例中，被配置为充当多个虚拟处理器的处理装置包括第一虚拟程序空间，其包括第一程序执行存储器，第一程序执行存储器包括用于运行能够执行非实时操作系统的代码 支持一个或多个非实时应用的第一虚拟程序空间，包括第二程序执行存储器的第二虚拟程序空间，所述第二程序执行存储器包括运行一个或多个实时过程的代码，以及中央处理单元（CPU ），其被配置为在第一操作模式和第二操作模式下操作，所述CPU被配置为使用用于所述第一操作模式的所述第一虚拟程序空间来执行操作系统和应用程序活动，而不使用所述第二虚拟程序空间并且没有明显干扰 以第二操作模式运行的一个或多个实时进程。

公开(公告)号：WO2011084542A1

公开(公告)日：2011-07-14

申请号：PCT/US2010/060612

申请日：2010-12-15

Applicant: QUALCOMM INCORPORATED ,  MORROW, Michael, William

Inventor： MORROW, Michael, William

IPC: G06F12/10

CPC classification number: G06F12/1027 ,  G06F12/1036 ,  G06F12/145 ,  G06F2212/1028 ,  G06F2212/655 ,  G06F2212/681 ,  Y02D10/13

Abstract: Circuits and related systems and methods for providing virtual address translation are disclosed. In one embodiment, a circuit comprises a comparator configured to receive as an input a current virtual address and a current attribute associated with the current virtual address, and a prior physical address and a prior virtual address each associated with the current attribute. The comparator is further configured to cause the prior physical address to be provided as a current physical address if the current virtual address matches the prior virtual address associated with the current attribute. As an example, the circuit may be a TLB suppression circuit configured to reduce TLB lookups. Reducing TLB lookups can reduce power dissipation. In this regard, the circuit may also be further configured to suppress a TLB lookup to reduce power dissipation when the current virtual address matches the prior virtual address.

Abstract translation: 公开了用于提供虚拟地址转换的电路及相关系统和方法。 在一个实施例中，电路包括比较器，其被配置为接收与当前虚拟地址相关联的当前虚拟地址和当前属性作为输入，以及与当前属性相关联的先前物理地址和先前虚拟地址。 如果当前虚拟地址匹配与当前属性相关联的先前虚拟地址，则比较器还被配置为使得先前的物理地址被提供为当前物理地址。 作为示例，电路可以是被配置为减少TLB查找的TLB抑制电路。 减少TLB查找可以减少功耗。 在这方面，电路还可以被配置为当当前虚拟地址与先前的虚拟地址匹配时，抑制TLB查找以减少功耗。