公开(公告)号：WO2019021113A1

公开(公告)日：2019-01-31

申请号：PCT/IB2018/055295

申请日：2018-07-17

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ,  IBM UNITED KINGDOM LIMITED ,  IBM (CHINA) INVESTMENT COMPANY LIMITED

Inventor： BALACHANDRAN, Subashini ,  ZHANG, Rui

IPC: G06F17/30

Abstract: A method for cognitively filtering data in a storage environment includes generating a plurality of cognitive data filters based on one or more factors to create a plurality of groups. The method also includes cognitively filtering data received by a global data repository to place independent portions of the data into the plurality of groups using the plurality of cognitive data filters prior to receiving a query on the global data repository. Data within each of the plurality of groups share a common definable characteristic.

公开(公告)号：WO2019016672A1

公开(公告)日：2019-01-24

申请号：PCT/IB2018/055243

申请日：2018-07-16

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ,  IBM UNITED KINGDOM LIMITED ,  IBM (CHINA) INVESTMENT COMPANY LIMITED ,  GLOBALFOUNDRIES INC, ,  SAMSUNG ELECTRONICS CO, LTD,

Inventor： FAN, Su Chen ,  PRANATHARTHIHARAN, Balasubramanian ,  GREENE, Andrew ,  XIE, Ruilong ,  RAYMOND, Mark, Victor ,  LIAN, Sean

IPC: H01L21/8238

Abstract: Techniques for forming self-aligned contacts by forming gate sidewall spacers and gates before forming the contacts are provided, in one aspect, a method of forming self-aligned contacts includes the steps of: forming multiple gate sidewall spacers on a substrate; burying the gate sidewall spacers In a dielectric; forming gate trenches by selectively rernoving the dielectric from: regions between the gate sidewall spacers in which gates will be formed; forming the gates in the gate trenches; forming contact trenches by selectively removing the dielectric from regions between the gate sidewall spacers in which the self-aligned contacts will be formed; and forming the self-aligned contacts in the contact trenches. A device structure having self-aligned contacts is also provided.

公开(公告)号：WO2019016640A1

公开(公告)日：2019-01-24

申请号：PCT/IB2018/054954

申请日：2018-07-05

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ,  IBM UNITED KINGDOM LIMITED ,  IBM (CHINA) INVESTMENT COMPANY LIMITED

Inventor： WANG, Jian Jun ,  RAO, Juan ,  NIE, Na ,  GUO, Ya Wei

IPC: G01C11/06

Abstract: Returning a location for a device is accomplished by receiving a first image, captured by a device, and a first orientation of the device from the device over one or more networks. A second image, captured by the device, and a second orientation of the device is received from the device over one or more networks. A first location of a first object included in the first image and a second location of a second object included in the second image can be determined respectively from a database of object locations. A location of the device is determined according to the first orientation, the second orientation, the first location of the first object and the second location of the second object. The device location is transmitted to the device.

公开(公告)号：WO2019016628A1

公开(公告)日：2019-01-24

申请号：PCT/IB2018/054458

申请日：2018-06-18

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ,  IBM UNITED KINGDOM LIMITED ,  IBM (CHINA) INVESTMENT COMPANY LIMITED

Inventor： ADAM, Constantin, Mircea ,  VUKOVIC, Maja ,  HWANG, Jinho ,  NADGOWDA, Shripad ,  ANEROUSIS, Nikolaos

IPC: G06F11/30 ,  G06F15/177

Abstract: Systems, computer-implemented methods and/or computer program products that facilitate compliance-aware runtime generation of containers are provided. In one embodiment, a computer-implemented method comprises: identifying, by a system operatively coupled to a processor, information used by a target application to containerize; determining whether one or more risk violations exist for the information within one or more defined thresholds; determining whether a compliance or a security violation exists in the information, wherein the determining whether the compliance or security violation exists is performed based on a determination by the risk assessment component that one or more risk violations do not exist; and generating a new container of components corresponding to defined components of the target application that allow the target application to execute without an underlying operating system, wherein the generating is based on a determination that no compliance or security violation exists in the information.

公开(公告)号：WO2019003078A1

公开(公告)日：2019-01-03

申请号：PCT/IB2018/054653

申请日：2018-06-25

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ,  IBM UNITED KINGDOM LIMITED ,  IBM (CHINA) INVESTMENT COMPANY LIMITED

Inventor： KARVE, Gauri ,  MONTANINI, Pietro ,  MILLER, Eric ,  KANAKASABAPATHY, Sivananda ,  GREENE, Andrew

IPC: H01L29/78 ,  H01L21/8238

Abstract: FinFET devices comprising multilayer gate spacers are provided, as well as methods for fabricating FinFET devices in which multilayer gate spacers are utilized to prevent or otherwise minimize the erosion of vertical semiconductor fins when forming the gate spacers. For example, a method for fabricating a semiconductor device comprises forming a dummy gate structure over a portion of a vertical semiconductor fin of a FinFET device, and forming a multilayer gate spacer on the dummy gate structure. The multilayer gate spacer comprises a first dielectric layer and a second dielectric layer, wherein the first dielectric layer has etch selectivity with respect to the vertical semiconductor fin and the second dielectric layer. In one embodiment, the first dielectric layer comprises silicon oxycarbonitride (SiOCN) and the second dielectric layer comprises silicon boron carbon nitride (SiBCN).

公开(公告)号：WO2018235014A1

公开(公告)日：2018-12-27

申请号：PCT/IB2018/054542

申请日：2018-06-20

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ,  IBM (CHINA) INVESTMENT COMPANY LTD. ,  IBM DEUTSCHLAND GMBH

Inventor： DELAMARCHE, Emmanuel ,  GOEKCE, Onur

IPC: B03B5/60

Abstract: The invention is directed to a microfluidic device. The device includes an input microchannel, a set of m distribution microchannels, a set of m microfluidic modules and a set of m nodes. The m microfluidic modules ( m ≥ 2) are in fluidic communication with the m distribution microchannels, respectively. The one or more nodes of the set of m nodes branch from the input microchannel, and further branch to a respective one of the set of m distribution microchannels. In addition, a subset, but not all, of the nodes are altered. The nodes of the set of m nodes have different liquid pinning strengths. As a result, the extent in which a liquid passes through one or more of the m microfluidic modules varies based on the different liquid pinning strengths, in operation. Additional sets of nodes may be provided to allow liquid to pass through ordered pairs of modules.

公开(公告)号：WO2018234859A1

公开(公告)日：2018-12-27

申请号：PCT/IB2017/057723

申请日：2017-12-07

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ,  IBM UNITED KINGDOM LIMITED ,  IBM (CHINA) INVESTMENT COMPANY LIMITED

Inventor： BALAGURUSAMY, Venkat ,  DILLENBERGER, Donna, N Eng ,  LIGMAN, Joseph

IPC: G01N33/38

Abstract: In a technique for mapping one or more inclusions in a mineral crystal, a set of image data associated with the mineral crystal is received. The received set of image data is analyzed. One or more inclusions associated with the mineral crystal is identified based on the analyzed image data. The identified one or more inclusions of the mineral crystal are mapped to a tree structure representing the surface of the mineral crystal. The mapped one or more inclusions are encoded as a chain-code associated with the mineral crystal. A radial distance between a center of mass value of the mineral crystal and a center of mass value of the identified one or more inclusions is calculated and a mineral crystal fingerprint is generated.

公开(公告)号：WO2018229701A1

公开(公告)日：2018-12-20

申请号：PCT/IB2018/054357

申请日：2018-06-14

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ,  IBM (CHINA) INVESTMENT COMPANY LTD. ,  IBM DEUTSCHLAND GMBH

Inventor： RECKTENWALD, Martin ,  SAPORITO, Anthony ,  JACOBI, Chistian ,  TSAI, Aaron ,  REICHART, Johannes Christian ,  HELMS, Markus Michael ,  MAYER, Ulrich

IPC: G06F12/08

Abstract: Disclosed herein is a virtual cache and method in a processor for supporting multiple threads on the same cache line. The processor is configured to support virtual memory and multiple threads. The virtual cache directory includes a plurality of directory entries, each entry is associated with a cache line. Each cache line has a corresponding tag. The tag includes a logical address, an address space identifier, a real address bit indicator, and a per thread validity bit for each thread that accesses the cache line. When a subsequent thread determines that the cache line is valid for that thread the validity bit for that thread is set, while not invalidating any validity bits for other threads.

公开(公告)号：WO2018229700A1

公开(公告)日：2018-12-20

申请号：PCT/IB2018/054356

申请日：2018-06-14

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ,  IBM (CHINA) INVESTMENT COMPANY LTD. ,  IBM DEUTSCHLAND GMBH

Inventor： RECKTENWALD, Martin ,  JACOBI, Christian ,  REICHART, Johannes Christian ,  HELMS, Markus Michael

IPC: G06F12/08

Abstract: Disclosed herein is a virtual cache directory in a processor that eliminates address translations when the virtual address and the real address in the cache directory are the same. The processor is configured to support virtual memory and multiple threads. The virtual cache directory includes a plurality of directory entries, each entry is associated with a cache line. Each cache line has a tag. The tag includes a logical address, an address space identifier, a real address bit indicator, and virtual address to real address indicator. This virtual address to real address indicator indicates if the logical address and the real address are the same. When activated, address translation is not performed.

公开(公告)号：WO2018224963A1

公开(公告)日：2018-12-13

申请号：PCT/IB2018/054020

申请日：2018-06-05

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ,  IBM UNITED KINGDOM LIMITED ,  IBM (CHINA) INVESTMENT COMPANY LIMITED

Inventor： NAKAMURA, Yutaka ,  DEBROSSE, John, Kenneth

IPC: H03K19/018

Abstract: A method includes applying a first voltage to a source of a first p-channel FET connected in series with a second p- channel FET, applying a second voltage, lower than the first voltage, to a source of a third p-channel FET connected in series with a fourth p-channel FET, applying a third voltage, lower than the first and second voltages, to a source of a second n-channel FET connected in series with a first n-channel FET, drains of the second p- channel FET, the fourth p-channel FET, and the first n-channel FET connect at a connection point including an output terminal for outputting an output signal, and outputting one of the first voltage, the second voltage, and the third voltage from the output terminal based on input signals inputted to corresponding gates of the first p-channel FET, the third p-channel FET, the fourth p-channel FET, and the second n-channel FET.