公开(公告)号：US08424393B1

公开(公告)日：2013-04-23

申请号：US13275693

申请日：2011-10-18

Applicant: Seong-Jae Lee

Inventor： Seong-Jae Lee

IPC: G01L3/00

CPC classification number: G01L3/10 ,  G01L3/1435 ,  Y10T29/49826

Abstract: A magnetic torque sensing device having a disk-shaped member with a magnetoelastically active region. The magnetoelastically active region has oppositely polarized magnetically conditioned regions with initial directions of magnetization that are perpendicular to the sensitive directions of magnetic field sensor pairs placed proximate to the magnetically active region. Magnetic field sensors are specially positioned in relation to the disk-shaped member to accurately measure torque while providing improved RSU performance and reducing the detrimental effects of compassing.

Abstract translation: 一种磁转矩传感装置，具有具有磁弹性活性区域的盘形部件。 磁弹性有源区域具有相反极化的磁调节区域，其初始磁化方向垂直于靠近磁性有源区域放置的磁场传感器对的敏感方向。 磁场传感器相对于盘形部件特别定位，以精确测量扭矩，同时提供改进的RSU性能并减少罗盘的有害影响。

公开(公告)号：US08422314B2

公开(公告)日：2013-04-16

申请号：US13118287

申请日：2011-05-27

Applicant: Seong Jae Lee

Inventor： Seong Jae Lee

IPC: G11C7/10

CPC classification number: G11C11/406 ,  G11C11/40615 ,  G11C11/4076 ,  G11C11/4093

Abstract: A method is provided for achieving SRAM output characteristics from DRAMs, in which a plurality of DRAMs are arranged connected in parallel to a controller in such a way as to be able to obtain SRAM output characteristics using the DRAMs, comprising a process in which data is output to an external device when a control signal for data reading has been input from the external device, by sequentially repeating a step in which the controller sends a data output state control signal to one DRAM and sends a refresh standby state control signal to the other DRAMs, the data is read and sent to the external device from the DRAM in the output state, and a refresh standby state control signal is sent to the DRAM which was in the output state while an output state control signal is sent to another DRAM and data is read out from the DRAM in the output state, and a step in which the controller sends a control signal for changing the output state to the refresh standby state.

Abstract translation: 提供了一种用于实现DRAM的SRAM输出特性的方法，其中以能够使用DRAM获得SRAM输出特性的方式将多个DRAM并行连接到控制器的方式，包括数据为 当从外部设备输入用于数据读取的控制信号时，通过依次重复控制器向一个DRAM发送数据输出状态控制信号并向另一个DRAM发送刷新待机状态控制信号的步骤，将其输出到外部设备 DRAM，在输出状态下从DRAM读取数据并将其发送到外部设备，并且将刷新待机状态控制信号发送到处于输出状态的DRAM，同时将输出状态控制信号发送到另一个DRAM， 在输出状态下从DRAM中读出数据，并且控制器将用于将输出状态改变为刷新待机状态的控制信号的步骤。

公开(公告)号：US08413802B2

公开(公告)日：2013-04-09

申请号：US12520415

申请日：2006-12-13

Applicant: Jeong-Min Lee ,  Seong-Jae Lee

Inventor： Jeong-Min Lee ,  Seong-Jae Lee

IPC: B65D25/08

CPC classification number: B65D51/2864 ,  B65D25/082 ,  B65D51/2835 ,  B65D81/3222

Abstract: The present invention relates to a cap assembly mounted on a discharging portion of a container for containing an ingredient different from that in accommodated in a container, which comprise a cap body having a housing formed with a chamber for storage of a secondary ingredient, a closing element provided at a lower end opening of the housing for opening the lower end opening under pressure so as to open the lower end opening.

Abstract translation: 本发明涉及一种安装在容器的排出部分上的盖组件，该容器包含与容纳在容器中的成分不同的成分，该容器包括盖主体，该主体具有形成有用于存储次要成分的室， 设置在壳体的下端开口处，用于在压力下打开下端开口以打开下端开口。

公开(公告)号：US20120279939A1

公开(公告)日：2012-11-08

申请号：US13517353

申请日：2008-12-18

Applicant: Jeong-Min Lee ,  Seong-Jae Lee

Inventor： Jeong-Min Lee ,  Seong-Jae Lee

IPC: B65D51/00

CPC classification number: B65D81/3211 ,  B65D51/28 ,  B65D51/2807 ,  B65D2251/0025 ,  B65D2251/0093 ,  B65D2251/08

Abstract: A bottle cap which is combined with a beverage container in the direction of discharge or drinking, comprised of; a main body combined with the container; a storage space inside the main body which contains additives, and; filter holes formed above and below the storage space to keep the additives within the storage space; and the additives in the storage space is soluble in the liquid in the container and discharged through a spout above, and the flow path of the liquid is characterized by being configured to lead the liquid to the storage space of the additives to facilitate dissolution of the additives.

Abstract translation: 一个与排放或饮用方向的饮料容器组合的瓶盖，包括： 与容器结合的主体; 主体内容纳有添加剂的储存空间; 过滤孔形成在储存空间的上方和下方，以将添加剂保持在储存空间内; 并且储存空间中的添加剂溶解在容器中的液体中并通过上面的喷口排出，并且液体的流动路径的特征在于将液体引导到添加剂的储存空间以便于溶解 添加剂。

公开(公告)号：US08215505B2

公开(公告)日：2012-07-10

申请号：US10592028

申请日：2005-03-08

Applicant: Jeong-Min Lee ,  Seong-Jae Lee

Inventor： Jeong-Min Lee ,  Seong-Jae Lee

IPC: B65D47/00

CPC classification number: B65D51/2878 ,  B65D51/2864 ,  Y10S215/08

Abstract: A cap assembly that can be associated with a container storing a primary material includes a lid fixed on a top of the container and having an exhausting portion projected upward, a cap main body detachably coupled to the exhausting portion of the lid and having a storage tube extending downward to define a storage chamber for storing a secondary material, and an inner cap body detachably coupled to the storage tube.

Abstract translation: 可以与容纳主要材料的容器相关联的盖组件包括固定在容器的顶部上并具有向上突出的排出部分的盖，可拆卸地联接到盖的排出部分的盖主体，并具有储存管 向下延伸以限定用于存储次级材料的储存室，以及可拆卸地联接到储存管的内盖主体。

公开(公告)号：US20110197349A1

公开(公告)日：2011-08-18

申请号：US13029088

申请日：2011-02-16

Applicant: Seong-Jae LEE ,  Dennis O'Neel

Inventor： Seong-Jae LEE ,  Dennis O'Neel

IPC: A47K1/14

CPC classification number: F01M11/0408 ,  F01M2011/0416

Abstract: A drain plug comprising of a plurality of polarity magnets arranged in an alternating fashion. The plurality of polarity magnets are arranged in line with the drain plug. A magnet cover envelops the plurality of polarity magnets for easy cleaning. The unique alternating arrangements of the plurality of polarity magnets help increase the magnetic gradient for stronger attraction forces for metal wear particles. The use of a plurality of polarity magnets also increase the surface area where the metal particles can be held.

Abstract translation: 排水塞，其包括以交替方式布置的多个极性磁体。 多个极性磁体与排水塞一致排列。 磁体盖包围多个极性磁铁，以便于清洁。 多个极性磁体的独特交替布置有助于增加用于金属磨损颗粒的更强吸引力的磁梯度。 使用多个极性磁体也增加了可以保持金属颗粒的表面积。

公开(公告)号：US20090215232A1

公开(公告)日：2009-08-27

申请号：US12434779

申请日：2009-05-04

Applicant: Yark Yeon KIM ,  Seong Jae LEE ,  Moon Gyu JANG ,  Chel Jong CHOI ,  Myung Sim JUN ,  Byoung Chul PARK

Inventor： Yark Yeon KIM ,  Seong Jae LEE ,  Moon Gyu JANG ,  Chel Jong CHOI ,  Myung Sim JUN ,  Byoung Chul PARK

IPC: H01L21/338

CPC classification number: H01L29/47 ,  H01L29/458 ,  H01L29/4908 ,  H01L29/66545 ,  H01L29/66772 ,  H01L29/7839

Abstract: Provided are a Schottky barrier tunnel transistor and a method of manufacturing the same that are capable of minimizing leakage current caused by damage to a gate sidewall of the Schottky barrier tunnel transistor using a Schottky tunnel barrier naturally formed at a semiconductor-metal junction as a tunnel barrier. The method includes the steps of: forming a semiconductor channel layer on an insulating substrate; forming a dummy gate on the semiconductor channel layer; forming a source and a drain at both sides of the dummy gate on the insulating substrate; removing the dummy gate; forming an insulating layer on a sidewall from which the dummy gate is removed; and forming an actual gate in a space from which the dummy gate is removed. In manufacturing the Schottky barrier tunnel transistor using the dummy gate, it is possible to form a high-k dielectric gate insulating layer and a metal gate, and stable characteristics in silicidation of the metal layer having very strong reactivity can be obtained.

Abstract translation: 提供了一种肖特基势垒隧道晶体管及其制造方法，该晶体管能够使用在半导体 - 金属结上自然形成的肖特基隧道势垒作为隧道来最小化对肖特基势垒隧道晶体管的栅极侧壁的损坏所造成的漏电流 屏障。 该方法包括以下步骤：在绝缘基板上形成半导体沟道层; 在半导体沟道层上形成虚拟栅极; 在绝缘基板上的虚拟栅极的两侧形成源极和漏极; 去除虚拟门; 在去除所述伪栅极的侧壁上形成绝缘层; 并且在从其中去除虚拟栅极的空间中形成实际栅极。 在使用伪栅极制造肖特基势垒隧道晶体管时，可以形成高k电介质栅极绝缘层和金属栅极，并且可以获得具有非常强反应性的金属层的硅化物的稳定特性。

公开(公告)号：US07545000B2

公开(公告)日：2009-06-09

申请号：US11485837

申请日：2006-07-13

Applicant: Yark Yeon Kim ,  Seong Jae Lee ,  Moon Gyu Jang ,  Chel Jong Choi ,  Myung Sim Jun ,  Byoung Chul Park

Inventor： Yark Yeon Kim ,  Seong Jae Lee ,  Moon Gyu Jang ,  Chel Jong Choi ,  Myung Sim Jun ,  Byoung Chul Park

IPC: H01L27/01

CPC classification number: H01L29/47 ,  H01L29/458 ,  H01L29/4908 ,  H01L29/66545 ,  H01L29/66772 ,  H01L29/7839

Abstract: Provided are a Schottky barrier tunnel transistor and a method of manufacturing the same that are capable of minimizing leakage current caused by damage to a gate sidewall of the Schottky barrier tunnel transistor using a Schottky tunnel barrier naturally formed at a semiconductor-metal junction as a tunnel barrier. The method includes the steps of: forming a semiconductor channel layer on an insulating substrate; forming a dummy gate on the semiconductor channel layer; forming a source and a drain at both sides of the dummy gate on the insulating substrate; removing the dummy gate; forming an insulating layer on a sidewall from which the dummy gate is removed; and forming an actual gate in a space from which the dummy gate is removed. In manufacturing the Schottky barrier tunnel transistor using the dummy gate, it is possible to form a high-k dielectric gate insulating layer and a metal gate, and stable characteristics in silicidation of the metal layer having very strong reactivity can be obtained.

Abstract translation: 提供了一种肖特基势垒隧道晶体管及其制造方法，该晶体管能够使用在半导体 - 金属结上自然形成的肖特基隧道势垒作为隧道，将肖特基势垒隧道晶体管的栅极侧壁损坏所造成的漏电流减到最小 屏障。 该方法包括以下步骤：在绝缘基板上形成半导体沟道层; 在半导体沟道层上形成虚拟栅极; 在绝缘基板上的虚拟栅极的两侧形成源极和漏极; 去除虚拟门; 在去除所述伪栅极的侧壁上形成绝缘层; 并且在从其中去除虚拟栅极的空间中形成实际栅极。 在使用伪栅极制造肖特基势垒隧道晶体管时，可以形成高k电介质栅极绝缘层和金属栅极，并且可以获得具有非常强反应性的金属层的硅化物的稳定特性。

公开(公告)号：US20080254606A1

公开(公告)日：2008-10-16

申请号：US12090891

申请日：2006-12-04

Applicant: In Bok Baek ,  Seong Jae Lee ,  Jong Heon Yang ,  Chang Geun Ahn ,  Han Young Yu ,  Ki Ju Im

Inventor： In Bok Baek ,  Seong Jae Lee ,  Jong Heon Yang ,  Chang Geun Ahn ,  Han Young Yu ,  Ki Ju Im

IPC: H01L21/28

CPC classification number: H01L29/66439 ,  B82Y10/00 ,  H01L21/0273 ,  H01L21/28123 ,  H01L29/66484 ,  H01L29/66545 ,  H01L29/66575 ,  H01L29/66772 ,  H01L29/7613 ,  H01L29/7831

Abstract: Provided is a method of manufacturing a semiconductor device in which properties of photoresist through a lithography process are changed to form a dummy structure, and the structure is applied to a process of forming a gate electrode. The method includes the steps of: forming a buffer layer on the top of a semiconductor substrate; applying an inorganic photoresist on the buffer layer, and forming a photoresist pattern using a lithography process; thermally treating the photoresist pattern using a predetermined gas; uniformly depositing an insulating layer on the thermally treated structure, and etching the deposited layer by the deposited thickness in order to expose the thermally treated photoresist pattern; depositing an insulating layer on the etched structure, and etching the deposited insulating layer to expose the thermally treated photoresist pattern; removing the exposed photoresist pattern using an etching process; forming a gate oxide layer in the portion in which the photoresist pattern is removed; and forming a gate electrode on the gate oxide layer. Accordingly, in forming a structure for manufacturing a nano-sized device, the properties of the layer formed by a lithography process are improved through thermal treatment, and thus the structure used to manufacture various devices can be easily formed.

Abstract translation: 提供了通过光刻处理改变光致抗蚀剂的特性以形成虚拟结构的半导体器件的制造方法，并且将该结构应用于形成栅电极的工艺。 该方法包括以下步骤：在半导体衬底的顶部上形成缓冲层; 在缓冲层上施加无机光致抗蚀剂，并使用光刻工艺形成光致抗蚀剂图案; 使用预定气体热处理光刻胶图案; 在热处理结构上均匀沉积绝缘层，并通过沉积的厚度蚀刻沉积层，以暴露热处理的光致抗蚀剂图案; 在蚀刻的结构上沉积绝缘层，并蚀刻沉积的绝缘层以暴露热处理的光致抗蚀剂图案; 使用蚀刻工艺去除曝光的光致抗蚀剂图案; 在除去光致抗蚀剂图案的部分中形成栅氧化层; 以及在所述栅极氧化物层上形成栅电极。 因此，在形成纳米尺寸器件的制造结构时，通过热处理提高了通过光刻工艺形成的层的性质，因此可以容易地形成用于制造各种器件的结构。

公开(公告)号：US20080132049A1

公开(公告)日：2008-06-05

申请号：US11930902

申请日：2007-10-31

Applicant: Yark-Yeon KIM ,  Seong-Jae Lee ,  Moon-Gyu Jang ,  Tae-Youb Kim ,  Chel-Jong Choi ,  Myung-Sim Jun ,  Byoung-Chul Park

Inventor： Yark-Yeon KIM ,  Seong-Jae Lee ,  Moon-Gyu Jang ,  Tae-Youb Kim ,  Chel-Jong Choi ,  Myung-Sim Jun ,  Byoung-Chul Park

IPC: H01L21/334

CPC classification number: H01L29/78618 ,  H01L29/7839

Abstract: Provided is a method for fabricating a Schottky barrier tunnel transistor (SBTT) that can fundamentally prevent the generation of a gate leakage current caused by damage of spacers formed on both sidewalls of a gate electrode. The method for fabricating a Schottky barrier tunnel transistor, which includes: a) forming a silicon pattern and a sacrificial pattern on a buried oxide layer supported by a support substrate; b) forming a source/drain region on the buried oxide layer exposed on both sides of the silicon pattern, the source/drain region being formed of a metal layer and being in contact with both sidewalls of the silicon pattern; c) removing the sacrificial pattern to expose the top surface of the silicon pattern; and d) forming a gate insulating layer and a gate electrode on the exposed silicon pattern.

Abstract translation: 提供一种用于制造肖特基势垒隧道晶体管（SBTT）的方法，其可以从根本上防止由栅极电极的两个侧壁上形成的间隔物的损坏引起的栅极漏电流的产生。 一种制造肖特基势垒隧道晶体管的方法，包括：a）在由支撑衬底支撑的掩埋氧化物层上形成硅图案和牺牲图案; b）在暴露于硅图案的两侧的掩埋氧化物层上形成源极/漏极区域，源极/漏极区域由金属层形成并与硅图案的两个侧壁接触; c）去除牺牲图案以暴露硅图案的顶表面; 以及d）在暴露的硅图案上形成栅极绝缘层和栅电极。