公开(公告)号：US07007112B2

公开(公告)日：2006-02-28

申请号：US10140829

申请日：2002-05-09

Applicant: Takuya Ishida ,  Yoshiyuki Kamihara

Inventor： Takuya Ishida ,  Yoshiyuki Kamihara

IPC: G06F3/00

CPC classification number: G06F5/10

Abstract: A buffer is provided which includes an EP2 area (a data storage area set to FIFO) and a CSW area (a randomly accessible status storage area), when data and a CSW are allocated as information to be transferred through one end point EP2. When a phase has switched from a USB data phase (data transport) to a status phase (status transport), the information read area is switched from the EP2 area to the CSW area, and IN data to be transferred from the end point EP2 to a host is read from the CSW area. A CSW0 area for success status and a CSW1 area for non-success status are provided, and a status block packet in which is set either success or non-success default information is previously written therein.

Abstract translation: 提供了一种缓冲器，其包括EP2区域（设置为FIFO的数据存储区域）和CSW区域（随机可访问的状态存储区域），当数据和CSW被分配为要通过一个端点EP 2传送的信息时 。 当相位从USB数据相位（数据传输）切换到状态阶段（状态传输）时，信息读取区域从EP2区域切换到CSW区域，并且从端点EP传送IN数据 2从主机读取CSW区域。 提供了用于成功状态的CSW 0区域和用于非成功状态的CSW 1区域，并且其中设置了成功或非成功默认信息的状态块分组被预先写入其中。

公开(公告)号：US20050073877A1

公开(公告)日：2005-04-07

申请号：US10997871

申请日：2004-11-29

Applicant: Takuya Ishida ,  Yoshiyuki Kamihara

Inventor： Takuya Ishida ,  Yoshiyuki Kamihara

IPC: G06F13/38 ,  G06F3/00 ,  G06F5/00 ,  G06F13/12 ,  G06F13/40 ,  G11C11/00 ,  H03M9/00 ,  H04J3/18 ,  H04L12/40 ,  H04L25/49

CPC classification number: G06F13/4018

Abstract: A data transfer control device and an electronic instrument which can implement a process to be made on data transmitted and received through a high speed bus on a circuit operating at a low frequency. The data transfer control device has a conversion circuit which converts K-bit width data transferred at a frequency FC1 (in USB 2.0 HS mode) through a bus into data having an L-bit width (L>K) by rearranging, and a processing circuit which receives the L-bit width data from the conversion circuit and carries out a K-bit based process on an L-bit basis at a frequency FC2 lower than FC1. This enables to perform the K-bit based process at the low frequency FC2. Configuration on a transmission end can be implemented in the same manner. The transfer data in the USB 2.0 HS mode is processed on the L-bit basis while the transfer data in the FS mode is processed on the K-bit basis. The present invention is applicable also to the process on data transferred through a bus under the IEEE1394 or SCSI.

Abstract translation: 一种数据传输控制装置和电子仪器，其能够实现在以低频工作的电路上通过高速总线发送和接收的数据进行处理。 数据传送控制装置具有转换电路，其将通过总线将以频率FC1（USB 2.0 HS模式）传送的K位宽度数据转换为具有L位宽度（L> K）的数据通过重新排列，并且处理 电路，其从转换电路接收L位宽度数据，并以低于FC1的频率FC2以L位为基础执行基于K位的处理。 这使得能够在低频FC2下执行基于K位的处理。 传输端的配置可以以相同的方式实现。 USB 2.0 HS模式下的传输数据以L位为基础进行处理，同时以K位为基础处理FS模式下的传送数据。 本发明也适用于通过IEEE1394或SCSI下的总线传送的数据的处理过程。

公开(公告)号：US20050066077A1

公开(公告)日：2005-03-24

申请号：US10934461

申请日：2004-09-07

Applicant: Yukinari Shibata ,  Nobuyuki Saito ,  Tomonaga Hasegawa ,  Takuya Ishida

Inventor： Yukinari Shibata ,  Nobuyuki Saito ,  Tomonaga Hasegawa ,  Takuya Ishida

IPC: G06F3/00 ,  G06F1/04 ,  G06F1/32 ,  H03K19/00 ,  H03K19/0175 ,  H04L25/02 ,  H04L25/40 ,  H04L29/00

CPC classification number: G06F1/3203 ,  H04L25/0272

Abstract: A data transfer control device includes an OUT-transfer transmitter circuit which transmits OUT data by driving a serial signal line, a clock-transfer transmitter circuit which transmits a clock signal CLK by driving a serial signal line, a PLL circuit which generates the clock signal CLK, and a power-down setting circuit which sets a power-down mode. In a first power-down mode, the OUT-transfer transmitter circuit is set to the power-down mode, and the clock-transfer transmitter circuit is set to the power-down mode to stop a system clock signal of a target-side data transfer control device. In a second power-down mode, the OUT-transfer transmitter circuit is set to the power-down mode without setting the clock-transfer transmitter circuit to the power-down mode.

Abstract translation: 数据传送控制装置包括：通过驱动串行信号线发送OUT数据的OUT传送发送器电路;通过驱动串行信号线发送时钟信号CLK的时钟传送发送器电路;产生时钟信号的PLL电路 CLK，以及设置掉电模式的掉电设置电路。 在第一掉电模式中，OUT传输发射机电路被设置为掉电模式，并且时钟传送发射机电路被设置为掉电模式以停止目标侧数据的系统时钟信号 传输控制装置。 在第二个掉电模式下，OUT传输发射机电路设置为掉电模式，而不将时钟传输发射机电路设置为掉电模式。

公开(公告)号：US06201422B1

公开(公告)日：2001-03-13

申请号：US09355242

申请日：1999-10-13

Applicant: Takuya Ishida

Inventor： Takuya Ishida

IPC: H03L700

CPC classification number: H03K5/135

Abstract: A state machine operates in synchronization with a reference clock signal (110) to switch between n numbers of states and maintain any one of these states. Every time a condition for transition to each of the n numbers of states is satisfied, a signal output circuit (100) makes one of n numbers of transition condition satisfying signals (111W, 111Z, 111Y . . . ) active and outputs it. One of a plurality of D-type flip-flops (101-1, 101-2, 101-k . . . ) makes active any one of nu numbers of state signals (W, Z, Y . . . ) indicating the corresponding n numbers of states, and holds the corresponding one state. A synchronization pulse generation circuit (102) generates a one-shot synchronization pulse signal (112) in synchronization with the reference clock signal (110), when a transition condition for transition to one state is satisfied. When a one-shot synchronization pulse signal (112) is input to the D-type flip-flop (101-k) and also the condition for transition to state Y has been satisfied, the state Y is held during the period from after the establishment of the condition for transition to the state Y, until a condition for transition to another state such as W or Z is satisfied.

Abstract translation: 状态机与参考时钟信号（110）同步地操作，以在n个状态之间切换并保持这些状态中的任何一个。 每当满足转换到n个状态中的每一个状态的条件时，信号输出电路（100）使满足信号（111W，111Z，111Y ...）的n个转换条件中的一个被激活并输出。 多个D型触发器（101-1,101-2,101-k ...）中的一个使nu个状态信号（W，Z，Y ...）中的任一个表示相应的 n个状态，并保持相应的一个状态。 当满足转换到一个状态的转变条件时，同步脉冲发生电路（102）与参考时钟信号（110）同步地产生单稳态同步脉冲信号（112）。 当单触发同步脉冲信号（112）输入到D型触发器（101-k）并且还满足转换到状态Y的条件时，状态Y在从 建立转换到状态Y的条件，直到满足转换到诸如W或Z的另一状态的条件为止。

公开(公告)号：US06185061B2

公开(公告)日：2001-02-06

申请号：US08931413

申请日：1997-09-16

Applicant: Minehisa Yamamoto ,  Takuya Ishida

Inventor： Minehisa Yamamoto ,  Takuya Ishida

IPC: G11B503

CPC classification number: G11B19/02 ,  G11B5/012

Abstract: A semiconductor integrated circuit device has a data reproduction circuit for reproducing data read by a head from a magnetic disk during a read operation, a data output circuit for outputting reproduced data obtained as an output of the data reproduction circuit to an external circuit, and an erase current control circuit for controlling an erase current supplied to the head during an erase operation. During an erase operation, the data reproduction circuit is kept deactivated. During transition from an erase operation to a read operation, the data reproduction circuit is activated after the erase current is turned off, and thereafter the data output circuit is activated.

Abstract translation: 半导体集成电路器件具有数据再现电路，用于在读取操作期间再现由磁盘读取的数据;数据输出电路，用于将作为数据再现电路的输出获得的再现数据输出到外部电路;以及 擦除电流控制电路，用于在擦除操作期间控制提供给磁头的擦除电流。 在擦除操作期间，数据再现电路被保持停用。 在从擦除操作到读取操作的转变期间，在擦除电流关闭之后数据再现电路被激活，此后数据输出电路被激活。

公开(公告)号：US6127794A

公开(公告)日：2000-10-03

申请号：US497335

申请日：2000-02-03

Applicant: Takuya Ishida

Inventor： Takuya Ishida

IPC: G11B19/00 ,  G01R31/26 ,  G01R31/28 ,  G01R31/3185 ,  G11B19/02 ,  G11B19/20 ,  G11B21/08 ,  G11B27/36 ,  G11B33/12 ,  H01L21/822 ,  H01L27/00 ,  H01L27/04

CPC classification number: G11B19/20 ,  G11B27/36 ,  G11B33/122

Abstract: In a semiconductor integrated circuit device, after electric power starts being supplied thereto, when a control circuit 2 is turned on, a test signal is fed in via a clock output terminal 6. At this time, an on/off control signal is at a low level, which causes a controller 14 to feed a low-level signal through a buffer 17 to the gate terminal G of a latch circuit 15, and thus the test signal fed through a buffer 9 to the input terminal D of the latch circuit 15 is fed from the output terminal Q thereof to the controller 14. Having received the test signal, the controller 14 recognizes establishment of a test mode and turns the on/off control signal to a high level. This causes the latch circuit 15 to stop operating, and thus the controller 14 feeds a clock through an AND circuit 16 and a buffer 8 to a clock output terminal 6 for external output.

Abstract translation: 在半导体集成电路装置中，在电力供给开始后，当控制电路2接通时，经由时钟输出端子6输入测试信号。此时，开/关控制信号为 低电平，这使得控制器14通过缓冲器17将低电平信号馈送到锁存电路15的门极G，并且因此将测试信号通过缓冲器9馈送到锁存电路15的输入端D 从输出端子Q输入到控制器14.接收到测试信号后，控制器14识别测试模式的建立，并将接通/断开控制信号变为高电平。 这使得锁存电路15停止工作，因此控制器14通过AND电路16和缓冲器8将时钟馈送到时钟输出端6用于外部输出。

公开(公告)号：US09232842B2

公开(公告)日：2016-01-12

申请号：US13807328

申请日：2010-07-09

Applicant: Takuya Ishida

Inventor： Takuya Ishida

IPC: A61B17/30 ,  A45D26/00

CPC classification number: A45D26/0066

Abstract: Hair tweezers have a bend section from which a pair of opposing plate-shaped gripping sections extend in the longitudinal direction, and opposing gripping surfaces are respectively formed on the ends of the gripping sections which are located on the side facing the bend section. The hair tweezers do not cause a problem in that, when the hair tweezers are in use, the ends on the side on which the gripping surfaces are formed are displaced relative to each other in the vertical direction, which intersects the longitudinal direction, to make it difficult for the user to grip a targeted unwanted hair. The thickness of a bend portion is equal to or greater than the thickness of the portions of a pair of gripping sections which are not included in the bend section. The pair of gripping sections are respectively provided with thin sections, which have a small thickness, located between the bend section and the ends having the gripping surfaces formed thereon.

Abstract translation: 镊子具有弯曲部分，一对相对的板状夹紧部分从纵向方向延伸，并且相对的夹持表面分别形成在位于与弯曲部分相对的一侧的夹持部分的端部上。 头发镊子不会引起问题，即当使用发镊子时，形成有抓持表面的一侧上的端部在与纵向相交的垂直方向上相对于彼此位移，使得 用户难以握住目标不想要的头发。 弯曲部分的厚度等于或大于不包括在弯曲部分中的一对夹持部分的部分的厚度。 一对抓持部分分别设置有薄壁部分，该部分具有小的厚度，位于弯曲部分和具有形成在其上的抓握表面的端部之间。

公开(公告)号：US20140202003A1

公开(公告)日：2014-07-24

申请号：US14237679

申请日：2012-04-23

Applicant: Takuya Ishida

Inventor： Takuya Ishida

IPC: A45D29/02

CPC classification number: A45D29/02

Abstract: The nail clippers are designed for bringing one cutting edge formed on a tip of the one cutting blade closer to the other cutting edge, the one cutting edge and the other cutting edge being disposed facing opposite each other and holding a particular nail being to be cut between the two opposed cutting edges to cause the two opposed cutting edges to engage each other and cut that particular nail. The one cutting edge and the other cutting edge have, respective straight line portions which face opposite each other and extend parallel to each other and respective curved portions which are provided contiguously to the corresponding straight line portions and which are curved and extended at a curvature that permits the one curved portion to exactly match the other curved portion when they meet each other.

Abstract translation: 指甲刀被设计成使形成在一个切割刀片的尖端上的一个切割刃更靠近另一个切割刃，一个切割边缘和另一个切割刃被设置为面对彼此并且保持特定的待切割的指甲 在两个相对的切割边缘之间，使两个相对的切割刃彼此接合并切割该特定的指甲。 一个切削刃和另一个切削刃具有彼此相对并且彼此平行延伸的相应的直线部分和相应的弯曲部分，这些弯曲部分与相应的直线部分相邻地设置，并且弯曲并以曲率延伸 允许一个弯曲部分在彼此相遇时精确地匹配另一个弯曲部分。

公开(公告)号：US20120294686A1

公开(公告)日：2012-11-22

申请号：US13512254

申请日：2010-11-29

Applicant: Takuya Ishida

Inventor： Takuya Ishida

IPC: B23C5/20 ,  B23B27/16 ,  B23C5/06 ,  B23B27/22

CPC classification number: B23C5/06 ,  B23C5/202 ,  B23C2200/081 ,  B23C2200/082 ,  B23C2200/086 ,  B23C2200/087 ,  B23C2200/128 ,  B23C2200/205 ,  B23C2200/323 ,  Y10T82/10 ,  Y10T407/1924 ,  Y10T407/23 ,  Y10T407/235 ,  Y10T409/303808

Abstract: A cutting insert according to an embodiment of the present invention includes an upper surface; a lower surface; a side surface located between the upper surface and the lower surface; at least one concave part extending in a thickness direction in the side surface, and having one end thereof located at the upper surface; and a cutting edge which is located at an intersection region of the upper surface and the side surface, and is divided into a plurality of divided cutting edges with the at least one concave part interposed therebetween. The upper surface includes a first raised part located inwardly of the at least one concave part, and a plurality of second raised parts respectively located inwardly of the plurality of divided cutting edges. The plurality of the second raised parts are located inward compared to one end of the first raised part close to the cutting edge in a top view. A cutting tool including the cutting insert, and a method of manufacturing a machined product using the cutting tool are also provided.

Abstract translation: 根据本发明的实施例的切削刀片包括上表面; 下表面 位于上表面和下表面之间的侧表面; 至少一个凹部，其在所述侧面中沿厚度方向延伸，并且其一端位于所述上表面; 以及位于所述上表面和所述侧面的交叉区域的切削刃，并且分割成具有所述至少一个凹部的多个分割切削刃。 上表面包括位于至少一个凹部内侧的第一凸起部分和分别位于多个分割切削刃内侧的多个第二凸起部分。 与俯视图中靠近切削刃的第一升高部的一端相比，多个第二凸部位于内侧。 还提供了包括切削刀片的切削工具以及使用切削工具制造加工产品的方法。

公开(公告)号：US08025465B2

公开(公告)日：2011-09-27

申请号：US12994627

申请日：2009-09-29

Applicant: Takuya Ishida

Inventor： Takuya Ishida

IPC: B23C5/20 ,  B23C5/22

CPC classification number: B23C5/06 ,  B23C5/202 ,  B23C2200/128 ,  B23C2200/205 ,  B23C2200/246 ,  B23C2200/326 ,  Y10T407/192 ,  Y10T407/1924 ,  Y10T407/23 ,  Y10T407/235 ,  Y10T407/24 ,  Y10T409/303752 ,  Y10T409/303808

Abstract: A cutting tool comprises: a first cutting insert having a first side surface for interconnecting a first upper surface and a first lower surface, a first cutting edge located at the intersection between the first upper surface and the first side surface, and a first groove section located in the first side surface and extending to the first upper surface so as to divide the first cutting edge; a second cutting insert having a second upper surface, a second side surface, a second cutting edge located at the intersection between the second upper surface and the second side surface, and a cutting edge reinforcing section located on the second upper surface at an end thereof which is positioned on the second cutting edge side; and a holder for mounting thereto the first cutting insert and the second cutting insert. The first cutting insert and the second cutting insert are mounted to the holder in such a manner that the first cutting edge and the second cutting edge are located on the outer peripheral side of the holder, that the first lower surface and the second upper surface are in proximity to each other, and that the rotation trajectories of the cutting edge reinforcing section and the first groove section are partially superposed on each other.

Abstract translation: 切割工具包括：第一切削刀片，其具有用于互连第一上表面和第一下表面的第一侧表面，位于第一上表面和第一侧表面之间的交叉点处的第一切削刃，以及第一凹槽部分 位于所述第一侧表面中并延伸到所述第一上表面以便分割所述第一切割边缘; 第二切削刀片，其具有第二上表面，第二侧表面，位于第二上表面和第二侧表面之间的相交处的第二切削刃，以及位于其末端的第二上表面上的切削刃加强部 其位于第二切削刃侧; 以及用于将第一切削刀片和第二切削刀片安装到其上的保持器。 第一切削刀片和第二切削刀片以这样的方式安装到保持器，使得第一切削刃和第二切削刃位于保持器的外周侧，第一下表面和第二上表面是 彼此接近，并且切割边缘加强部分和第一凹槽部分的旋转轨迹部分地叠置在一起。