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31.发明授权
公开(公告)号：KR101175178B1
公开(公告)日：2012-08-20
申请号：KR1020110023157
申请日：2011-03-16
Applicant: 연세대학교 산학협력단
IPC: H01L31/072 , H01L31/04 , H01L31/18
CPC classification number: Y02E10/50 , H01L31/072 , H01L31/04 , H01L31/18
Abstract: PURPOSE: A bulk heterojunction type solar cell and a manufacturing method thereof are provided to improve light conversion efficiency by enhancing the crystallinity of P3HT used as a photo active layer. CONSTITUTION: An anode layer(10) is formed on a substrate. A first recombination preventing layer(20) is formed on the anode layer. A photo active layer(30) is formed on the first recombination preventing layer. A second recombination preventing layer is formed on the photo active layer. A cathode layer is formed on the second recombination preventing layer.
Abstract translation: 目的：提供一种本体异质结型太阳能电池及其制造方法，以通过提高作为光活性层的P3HT的结晶度来提高光转换效率。 构成：在基板上形成阳极层（10）。 在阳极层上形成第一复合防止层（20）。 在第一重组防止层上形成光活性层（30）。 在光活性层上形成第二重组防止层。 在第二重组防止层上形成阴极层。
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公开(公告)号：KR101100618B1
公开(公告)日：2012-01-03
申请号：KR1020100120191
申请日：2010-11-30
Applicant: 연세대학교 산학협력단
IPC: H01L21/20
CPC classification number: H01L2224/95085
Abstract: PURPOSE: A dense laminated monolayer manufacturing method using a self assembling method and an electronic device including a monolayer are provided to manufacture nano wires in a short time in a two-dimensionally dense laminated monolayer shape without a separate post-treatment process. CONSTITUTION: A nano wire solution for dipping nano wires is prepared. The nano wire solution is put into a miscible solution which can be mixed with the nano wire solution. A dense laminated monolayer comprised of the nano wires is arranged on the surface of the miscible solution. An acid solution is used as the miscible solution. The area of the dense laminated monolayer is increased when the density of the nano wires in the nano wire solution is increased.
Abstract translation: 目的：提供一种使用自组装方法的致密层压单层制造方法和包括单层的电子器件，以在短时间内以二维致密的层叠单层形状制造纳米线，而无需单独的后处理工艺。 构成：制备用于浸渍纳米线的纳米线溶液。 将纳米线溶液放入可与纳米线溶液混合的混溶溶液中。 在可混溶溶液的表面上设置由纳米线组成的致密层压单层。 使用酸溶液作为可混溶溶液。 当纳米线溶液中的纳米线的密度增加时，致密层压单层的面积增加。
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公开(公告)号：KR101081739B1
公开(公告)日：2011-11-09
申请号：KR1020090110061
申请日：2009-11-16
Applicant: 연세대학교 산학협력단
IPC: H01L27/115 , H01L21/8247
Abstract: 본발명에따라서비휘발성저항스위칭메모리소자가제공되는데, 바닥전극역할을하는 p형 Si 기판과; 상기 Si 기판위에형성되어, 비휘발성메모리소자의동작전압을제어하고전류의 ON/OFF 비를증대시키는절연층과; 상기절연층상에형성되는저항성스위칭거동층과; 상기저항성스위칭거동층상에형성되는금속층을포함하는것을특징으로한다.
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公开(公告)号：KR1020100053081A
公开(公告)日：2010-05-20
申请号：KR1020080112055
申请日：2008-11-12
Applicant: 연세대학교 산학협력단
IPC: B82B3/00 , H01L21/027
CPC classification number: B81C1/00206 , B81B2203/0361 , C30B25/005 , C30B25/04 , C30B29/16 , C30B29/605 , G03F7/0035 , H01L21/02521 , H01L21/02554 , H01L21/02603 , H01L21/02639 , H01L21/0331 , B82Y40/00
Abstract: PURPOSE: A method for patterning a nanowire on the surface of a substrate is provided to easily remove a sacrificial layer by non-chemical solvent and to chemically prevent nanowire when removing the sacrificial layer. CONSTITUTION: A method for pattering a nanowire on the surface of a substrate comprises: a step of providing the substrate having fluorination barium sacrificial layer formed on the surface in a desired pattern; a step of growing the nanowire through whole surface of the substrate including the fluorination barium sacrificial layer; and a step of removing the fluorination barium sacrificial layer together with the nanowire by solvent. The surface of the fluorination barium sacrificial layer is polycrystalline or amorphous surface.
Abstract translation: 目的：提供一种用于在衬底表面上图形化纳米线的方法，以便通过非化学溶剂容易地去除牺牲层，并且在去除牺牲层时化学防止纳米线。 构成：用于对衬底表面上的纳米线进行图案化的方法包括：以期望的图案提供在表面上形成的具有氟化钡牺牲层的衬底的步骤; 通过包括氟化钡牺牲层的衬底的整个表面生长纳米线的步骤; 以及通过溶剂与纳米线一起除去氟化钡牺牲层的步骤。 氟化钡牺牲层的表面是多晶或无定形表面。
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公开(公告)号：KR100819744B1
公开(公告)日：2008-04-08
申请号：KR1020070013620
申请日：2007-02-09
Applicant: 연세대학교 산학협력단
IPC: H01L27/146
CPC classification number: H01L27/1461 , H01L27/14607 , H01L27/1462 , H01L27/14685 , H01L27/14689 , H01L27/14692
Abstract: A 3-dimensional structure laminated compound semiconductor solid-state image sensor and a method for manufacturing the same are provided to reduce the degradation of photosensitive efficiency and charge capacity and to implement a micro pixel by maximizing a photoresist area of a photodiode to increase the amount of incident light. A photodiode region(206) is formed on a first conductive type semiconductor substrate(204) and comprised of a second conductive type impurity layer. A signal detection region(208) is separated from the photodiode region and comprised of a second conductive type impurity layer. Plural metal lines(203) are electrically connected to the signal detection region. A transfer gate(202) is formed on the first conductive type semiconductor substrate. The transfer gate is connected to transmit charges between the photodiode region and the signal detection region. Plural interlayer dielectrics(210) are formed on the first conductive type semiconductor substrate including the photodiode region, the transfer gate, and the signal detection region. A compound semiconductor epi layer(201) is formed by implanting P type and N type impurities into a space between each interlayer dielectric. The space is formed by etching the interlayer dielectric.
Abstract translation: 提供三维结构层叠化合物半导体固态图像传感器及其制造方法，以减少感光效率和充电容量的降低，并通过使光电二极管的光致抗蚀剂面积最大化来实现微像素，从而增加量 的入射光。 光电二极管区域（206）形成在第一导电类型半导体衬底（204）上并由第二导电类型杂质层构成。 信号检测区域（208）与光电二极管区域分离并由第二导电型杂质层组成。 多个金属线（203）电连接到信号检测区域。 在第一导电型半导体衬底上形成传输门（202）。 传输门被连接以在光电二极管区域和信号检测区域之间传送电荷。 在包括光电二极管区域，传输门和信号检测区域的第一导电类型半导体衬底上形成多层间电介质（210）。 通过将P型和N型杂质注入到每个层间电介质之间的空间中，形成化合物半导体外延层（201）。 通过蚀刻层间电介质形成空间。
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Patent Agency Ranking
公开(公告)号：KR1020080000252A
公开(公告)日：2008-01-02
申请号：KR1020060057902
申请日：2006-06-27
Applicant: 엘지디스플레이 주식회사 , 연세대학교 산학협력단
IPC: G02F1/1368 , B82Y30/00
CPC classification number: G02F1/136 , G02F1/136286 , H01L27/124 , H01L29/786
Abstract: A TFT(Thin Film Transistor), a fabrication method thereof, an LCD using the same and a fabrication method thereof are provided not to require an additional process for crystallization as in a poly silicon TFT. A gate electrode(112) is formed at a predetermined portion on a substrate(111). A gate dielectric layer(113) is formed on an entire substrate including the gate electrode. A magnetization metal(116) is formed on the gate dielectric layer at a central portion of the gate electrode. A semiconductor layer(114) is formed to surround the magnetization metal, and is formed of a nano-material coupled with a side surface of the magnetization metal by a magnetic-field particle. A source electrode(120) and a drain electrode(121) are separated at both sides of the semiconductor layer at a predetermined interval.
Abstract translation: 提供TFT（薄膜晶体管），其制造方法，使用该TFT的TFT及其制造方法，不需要如多晶硅TFT那样的附加结晶工艺。 在基板（111）上的预定部分处形成栅电极（112）。 在包括栅电极的整个基板上形成栅介质层（113）。 在栅电极的中心部分的栅介质层上形成磁化金属（116）。 半导体层（114）形成为围绕磁化金属，并且由与磁化金属的侧表面通过磁场粒子耦合的纳米材料形成。 源电极（120）和漏电极（121）以预定间隔在半导体层的两侧分离。
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公开(公告)号：KR1020180081387A
公开(公告)日：2018-07-16
申请号：KR1020170002548
申请日：2017-01-06
Applicant: 연세대학교 산학협력단 , 가천대학교 산학협력단
CPC classification number: H01L33/0041 , H01L29/0669 , H01L29/1066 , H01L29/66893 , H01L33/0008 , H01L33/005 , H01L33/50 , H01L33/58 , H01L2924/12041
Abstract: 본발명은발광트랜지스터및 이의제조방법에관한것이다. 본발명의일 실시예에따르면, 제 1 전극; 상기제 1 전극에전기적으로연결되고, 서로대향하는제 1 면및 제 2 면을갖는 P 형반도체; 상기 P 형반도체의상기제 1 면에결합된절연막을포함하는게이트전극; 상기 P 형반도체의상기제 2 면과 PN 접합을형성하는 N 형반도체; 및상기 N 형반도체에전기적으로연결되는제 2 전극을포함하며, 상기절연막을포함하는게이트전극은상기 P 형반도체에전계를인가하여상기 P 형반도체의정공농도및 페르미레벨중 적어도하나를제어하는발광트랜지스터가제공될수 있다.
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公开(公告)号：KR20180007625A
公开(公告)日：2018-01-23
申请号：KR20160088907
申请日：2016-07-13
Applicant: 연세대학교 산학협력단
CPC classification number: H01L33/02 , H01L33/0008 , H01L33/005 , H01L33/38 , H01L33/44 , H01L2924/12041
Abstract: 본발명은발광다이오드및 이의제조방법에관한것이다. 본발명의일 실시예에따르면, 제 1 전극, 상기제 1 전극상의산화아연의나노로드들을포함하는 N 형산화아연층, 상기산화아연층상에형성되어이종접합을형성하는산화구리의나노로드들을포함하는 P 형산화구리층및 상기산화구리층상에형성되는제 2 전극을포함하는발광다이오드가제공될수 있다.
Abstract translation: 发光二极管及其制造方法技术领域本发明涉及一种发光二极管及其制造方法。 根据本发明，所述第一电极的一个实施例中，N型氧化锌层，氧化铜中的哪一个的氧化锌层上形成的纳米棒以形成包含氧化锌的第一电极上的纳米棒异质结 并且可以提供在氧化铜层上形成的第二电极。
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公开(公告)号：KR101776393B1
公开(公告)日：2017-09-08
申请号：KR1020150120744
申请日：2015-08-27
Applicant: 연세대학교 산학협력단
Abstract: 본발명에따라서기판과; 상기기판상에형성된배리어층과; 상기배리어층 상에용액처리공정을통해형성되고패터닝된활성층과; 상기활성층상에형성된소스및 드레인전극으로서, 상기각 전극은탄소나노튜브와산화물나노입자의하이브리드박막으로구성되고, 상기산화물나노입자는상기탄소나노튜브보다일함수가작으며상기탄소나노튜브에물리흡착되어있는, 상기소스및 드레인전극과; 상기전극상에용액처리공정에기반하여형성된유전체층과, 상기유전체층 상에형성된탑 게이트전극을포함하는트랜지스터가제공된다.
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