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公开(公告)号:US20190088207A1
公开(公告)日:2019-03-21
申请号:US16134802
申请日:2018-09-18
Applicant: Apple Inc.
Inventor: Chin-Wei Lin , Majid Gharghi , Mohammad Reza Esmaeili Rad , Yun Wang , Jie Won Ryu , Kingsuk Brahma , Shingo Hatanaka , Shinya Ono , Ting-Kuo Chang
IPC: G09G3/3266 , G09G3/3233
Abstract: A display may have rows and columns of pixels. Gate lines may be used to supply gate signals to rows of the pixels. Data lines may be used to supply data signals to columns of the pixels. The data lines may include alternating even and odd data lines. Data lines may be organized in pairs each of which includes one of the odd data lines and an adjacent one of the even data lines. Demultiplexer circuitry may be configured dynamically during data loading and pixel sensing operations. During data loading, data from display driver circuitry may be supplied, alternately to odd pairs of the data lines and even pairs of the data lines. During sensing, the demultiplexer circuitry may couple a pair of the even data lines to sensing circuitry in the display driver circuitry and then may couple a pair of the odd data lines to the sensing circuitry.
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公开(公告)号:US20180061366A1
公开(公告)日:2018-03-01
申请号:US15347611
申请日:2016-11-09
Applicant: Apple Inc.
Inventor: Koorosh Aflatooni , Sang Y. Youn , Mohammad Hajirostam , Yun Wang
IPC: G09G5/10
CPC classification number: G09G5/10 , G09G3/32 , G09G2300/0809 , G09G2310/0205 , G09G2310/0218 , G09G2310/0267 , G09G2310/08
Abstract: Display panels and methods for operating a display panel are described. In an embodiment, the display panel includes a plurality of pixels arranged in rows and columns, a plurality of rows of emission control lines extending through the plurality of rows of pixels, and a global emission line coupled to the plurality of rows of emission control lines. Modes of operation of the display panel include global flash mode and low persistence mode.
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公开(公告)号:US20170365213A1
公开(公告)日:2017-12-21
申请号:US15246345
申请日:2016-08-24
Applicant: Apple Inc.
Inventor: Warren S. Rieutort-Louis , Keitaro Yamashita , Tsung-Ting Tsai , Yun Wang , Ting-Kuo Chang , Cheng-Ho Yu , Shinya Ono
IPC: G09G3/3233
CPC classification number: G09G3/3233 , G09G3/3266 , G09G2300/0819 , G09G2300/0842 , G09G2300/0861 , G09G2320/041 , G09G2320/045
Abstract: An organic light-emitting diode display may contain an array of display pixels. Each display pixel may have a respective organic light-emitting diode that is controlled by a drive transistor. At low temperatures, it may be necessary to increase the amount of current through an organic light-emitting diode to achieve a desired luminance level. In order to increase the current through the light-emitting diode, the ground voltage level may be lowered. However, this may lead to thin-film transistors within the pixel leaking, which may result in undesirable display artifacts such as bright dots being displayed in a dark image. In order to prevent leakage in the transistors, the transistors may be coupled to separate reference voltage supplies or separate control lines. Additionally, the transistors may be positioned to minimize leakage even at low ground voltage levels.
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公开(公告)号:US20160275889A1
公开(公告)日:2016-09-22
申请号:US14864136
申请日:2015-09-24
Applicant: Apple Inc.
Inventor: Cheng-Ho Yu , Keitaro Yamashita , Ting-Kuo Chang , Yun Wang , Hopil Bae , Kingsuk Brahma
CPC classification number: G09G3/3648 , G06F3/0412 , G06F3/0416 , G09G3/3677 , G09G2300/0452 , G09G2300/0871 , G09G2310/0289 , G09G2310/061 , G09G2310/08 , G09G2330/021 , G09G2354/00
Abstract: A touch screen display may include gate line driver circuitry coupled to a display pixel array. The display may be provided with intra-frame pausing (IFP) capabilities, where touch or other operations may be performed during one or more intra-frame blanking intervals. In one suitable arrangement, a gate driver may be operable in a high impedance mode, where the output of the gate driver is left floating during touch or IFP intervals. In another suitable arrangement, the gate driver may be operable in an IFP reduced stress mode, where a digital pass gate in the gate driver is deactivated during IFP intervals. In yet another suitable arrangement, the gate driver may be operable in an all-gate-high (AGH) power-down mode, where the output of each gate driver in the driver circuitry is driven high in parallel when the displayed is being powered off. These arrangements may be implemented in any suitable combination.
Abstract translation: 触摸屏显示器可以包括耦合到显示像素阵列的栅极线驱动器电路。 显示器可以具有帧内暂停(IFP)能力,其中可以在一个或多个帧内消隐间隔期间执行触摸或其它操作。 在一种合适的布置中,栅极驱动器可以以高阻抗模式工作,其中栅极驱动器的输出在触摸或IFP间隔期间保持悬空。 在另一种合适的布置中,栅极驱动器可以在IFP减小应力模式下操作,其中栅极驱动器中的数字通道在IFP间隔期间被去激活。 在另一种合适的布置中,栅极驱动器可以以全栅极高(AGH)掉电模式工作,其中当所显示的电源被断电时,驱动器电路中的每个栅极驱动器的输出并联驱动为高并行 。 这些布置可以以任何合适的组合来实现。
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