Data sampling clock edge placement training for high speed GPU-memory interface
    33.
    发明申请
    Data sampling clock edge placement training for high speed GPU-memory interface 有权
    数据采样时钟边缘放置训练,用于高速GPU存储器接口

    公开(公告)号:US20050265064A1

    公开(公告)日:2005-12-01

    申请号:US10990658

    申请日:2004-11-16

    CPC classification number: G06F13/1689 G06F13/4234 H04L7/033

    Abstract: Circuits, methods, and apparatus for training a phase shift circuit to provide a phase shift for improved data recovery. A specific embodiment of the present invention provides a variable delay cell. A delay through the variable delay cell is changed while training patterns are received. The presence of errors in the received data pattern is tracked, and from the presence or absence of errors a preferred delay is selected and used for receiving data.

    Abstract translation: 用于训练相移电路以提供相移以改善数据恢复的电路,方法和装置。 本发明的具体实施例提供了一种可变延迟单元。 在接收到训练模式的同时改变通过可变延迟单元的延迟。 跟踪接收到的数据模式中的错误的存在,并且从出现或不存在错误,选择优选的延迟并用于接收数据。

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