公开(公告)号：JP2011054129A

公开(公告)日：2011-03-17

申请号：JP2009205077

申请日：2009-09-04

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： CHO KO ,  TAKAHASHI NOBUAKI ,  KOMATSU HIDEAKI ,  OSAWA FUMITOMO

IPC: G06F13/28

CPC classification number: G06F13/28

Abstract: PROBLEM TO BE SOLVED: To provide a DMA (direct memory access) transfer technology which is adapted to HILS and can suppress an overhead.
SOLUTION: In this computer system including a data transfer device for transferring data to a peripheral apparatus from a memory of a computer by DMA, a continuous DMA mechanism responds to perform processing and continuously repeatedly gives a data transfer request. In a simulation system for the HILS, data on a result of simulation are arranged in a prescribed area of the memory. In response to the data reading transfer request from the continuous DMA mechanism, the data are transferred to the continuous DMA mechanism from the memory together with data on a generation ID. The continuous DMA mechanism stores the transferred generation ID as a reception ID, and receives the transferred data in response to an effect that the transferred generation ID differs (having updated) from the stored reception ID. The continuous DMA mechanism continuously repeats the data transfer request until it is disabled.
COPYRIGHT: (C)2011,JPO&INPIT

Abstract translation: 要解决的问题：提供适用于HILS并可以抑制开销的DMA（直接存储器访问）传送技术。 解决方案：在该计算机系统中，包括用于通过DMA从计算机的存储器将数据传送到外围设备的数据传送装置，连续的DMA机制响应于执行处理并连续重复地提供数据传送请求。 在用于HILS的仿真系统中，将模拟结果的数据布置在存储器的规定区域中。 响应于来自连续DMA机制的数据读取传送请求，数据从存储器连同数据一起传送到连续的DMA机制。 连续DMA机制将传送的生成ID存储为接收ID，并且响应于所转移的生成ID与存储的接收ID不同（已更新）的效果接收传送的数据。 持续的DMA机制连续重复数据传输请求，直到被禁用为止。 版权所有（C）2011，JPO＆INPIT

公开(公告)号：JP2011022702A

公开(公告)日：2011-02-03

申请号：JP2009165698

申请日：2009-07-14

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： KONDO TAKESHI ,  KATAOKA MASAKI ,  KOMATSU HIDEAKI ,  OSAWA FUMITOMO

IPC: G06F11/28

CPC classification number: G06F17/5009 ,  G06F17/5095

Abstract: PROBLEM TO BE SOLVED: To improve operation speed of simulation by conforming synchronization timing between logic blocks connected to each other.
SOLUTION: In a simulation system having a plurality of peripherals communicating with each other, a weighted graph wherein communication times are set as weights, wherein the peripherals are set as nodes, and wherein connection paths are set as edges is configured. Among the communication times in a loop thereof, a minimum time is set as first synchronization timing, timing wherein an acceptable delay is added is set as second synchronization timing, and timing designated by a user to be longer than the first and second timing is set as third synchronization timing. The third synchronization timing is used in a portion where the timing is usable, so that the peripherals are synchronized in the longest possible synchronization timing.
COPYRIGHT: (C)2011,JPO&INPIT

Abstract translation: 要解决的问题：通过使彼此连接的逻辑块之间的同步定时保持一致，提高仿真的操作速度。 解决方案：在具有彼此通信的多个外围设备的模拟系统中，将通信时间设置为权重的加权图形，其中外围设备被设置为节点，并且其中配置连接路径作为边缘。 在其循环中的通信时间中，将最小时间设置为第一同步定时，将可接受延迟添加的定时设置为第二同步定时，并且设置用户指定为比第一和第二定时长的定时 作为第三同步定时。 在定时可用的部分中使用第三同步定时，使得外设在最长可能的同步定时中被同步。 版权所有（C）2011，JPO＆INPIT

公开(公告)号：JP2010134839A

公开(公告)日：2010-06-17

申请号：JP2008312264

申请日：2008-12-08

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： SAITO AKIRA ,  SHIMIZU SHUICHI ,  KOMATSU HIDEAKI

IPC: G06F19/00

Abstract: PROBLEM TO BE SOLVED: To provide a technique for enabling a discrete system simulator to rollback correctly. SOLUTION: The simulation system, which is implemented by a computer, has: a continuous system simulator; a discrete system simulator; an edge storage means which stores information on an edge signal of a pulse sent from the continuous system simulator to the discrete system simulator with time; a means which stores the occurrence time of an event of the discrete system simulator as a rollback time; a search means which searches the rollback time of the discrete system simulator before the occurrence time of the rollback in response to the rollback operation of the continuous system simulator; and a means which reads the edge signal corresponding to the rollback time found by the search means from the edge storage means and sends the signal to the discrete system simulator. COPYRIGHT: (C)2010,JPO&INPIT

Abstract translation: 要解决的问题：提供使离散系统模拟器正确回滚的技术。 解决方案：由计算机实现的仿真系统具有：连续的系统仿真器; 离散系统模拟器; 边缘存储装置，其将关于从连续系统模拟器发送的脉冲的边缘信号的信息随时间存储到离散系统模拟器; 将离散系统模拟器的事件的发生时间存储为回滚时间的装置; 搜索装置，响应于连续系统模拟器的回滚操作，在回滚的发生时间之前搜索离散系统模拟器的回滚时间; 以及从边缘存储装置读取与搜索装置所发现的回滚时间对应的边缘信号的装置，并将该信号发送到离散系统模拟器。 版权所有（C）2010，JPO＆INPIT

公开(公告)号：JP2010113619A

公开(公告)日：2010-05-20

申请号：JP2008287111

申请日：2008-11-07

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： KATAOKA MASAKI ,  KOMATSU HIDEAKI

IPC: G06F11/28

Abstract: PROBLEM TO BE SOLVED: To provide a simulation program reducing CPU load by avoiding excessive use of bus resources which may be caused by external interrupt processing included in an infinite loop. SOLUTION: When an infinite loop is included in a source code, there is no code escaping from the infinite loop except external interruption and there is also no code having side effects to the outside of the loop, a processing program adds a return address of external interrupt processing in the infinite loop to a map in preprocessing. When a simulation program operates in a computer system, reaches the infinite loop and arrives at the external interrupt processing code in the infinite loop, the simulation program executes the external interrupt processing. When the external interrupt processing is performed as a result of interruption check and processing is returned from the external interrupt processing, whether the return address of the external interrupt processing exists in the map or not is checked. When the return address exists, a thread of the simulation program is stopped. COPYRIGHT: (C)2010,JPO&INPIT

Abstract translation: 要解决的问题：通过避免过多使用可能由无限循环中的外部中断处理引起的总线资源来提供减少CPU负载的仿真程序。 解决方案：当源代码中包含无限循环时，除了外部中断之外，没有任何代码从无限循环中转义，并且还没有对循环外部的副作用的代码，处理程序会添加一个返回值 无限循环中的外部中断处理地址到预处理中的映射。 当仿真程序在计算机系统中运行时，达到无限循环并到达无限循环中的外部中断处理代码，仿真程序执行外部中断处理。 当从外部中断处理返回中断检查和处理的结果执行外部中断处理时，检查在映射中是否存在外部中断处理的返回地址。 当返回地址存在时，仿真程序的线程被停止。 版权所有（C）2010，JPO＆INPIT

公开(公告)号：JP2010086207A

公开(公告)日：2010-04-15

申请号：JP2008253445

申请日：2008-09-30

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： SHIMIZU SHUICHI ,  KOMATSU HIDEAKI ,  KAJITANI KOICHI

IPC: F02D45/00 ,  G06F19/00

Abstract: PROBLEM TO BE SOLVED: To prevent the accumulation of the errors of values to be simulated in a simulation system.
SOLUTION: The simulation system is provided with a prediction module 710 for predicting a plurality of future values from the values of a plurality of input events in a logical process. The prediction module predicts the values of a plurality of future events from the values of a plurality of past events, and performs precedence speculation based on the predicted values of events until a new event is input. An error is generated between the plurality of newly predicted values of the events and the plurality of previously predicted values of events. The cumulative sum of the errors between the plurality of this time newly predicted values of events and the plurality of previously predicted values of events is calculated, and the number m of events whose cumulative sum falls into a prescribed threshold is calculated. The prediction module 10 rolls back the precedence speculation to time n+m within the range of the allowable error. The cumulative errors are distributed to a certain future point of time n+2m so as to be adjusted. Thus, it is possible to prevent errors from being accumulated.
COPYRIGHT: (C)2010,JPO&INPIT

Abstract translation: 要解决的问题：为了防止模拟系统中要模拟的值的错误的累积。 解决方案：模拟系统设置有预测模块710，用于根据逻辑过程中的多个输入事件的值来预测多个未来值。 预测模块从多个过去事件的值预测多个未来事件的值，并且基于事件的预测值来执行优先推测，直到输入新事件。 在事件的多个新预测值和多个先前预测的事件值之间产生错误。 计算出这个时刻的多个事件的新预测值与多个先前预测的事件值之间的误差的累积和，并且计算其累积和落入规定阈值的事件的数量m。 预测模块10在允许误差的范围内将优先推测回滚到时间n + m。 累积误差分布到n + 2m的某个未来时间点，以进行调整。 因此，可以防止错误累积。 版权所有（C）2010，JPO＆INPIT

公开(公告)号：JP2009223572A

公开(公告)日：2009-10-01

申请号：JP2008066695

申请日：2008-03-14

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： OBARA MORIMIKI ,  KOMATSU HIDEAKI

IPC: G06F9/48

CPC classification number: G06F9/541

Abstract: PROBLEM TO BE SOLVED: To convert an existing application program into a batch processing program for collectively processing a plurality of job requests.
SOLUTION: The converter includes: a code identification part for identifying a portion including an access request code for issuing a server processing request to request processing to another server and a portion including a processing code for executing any processing other than the server processing request in an application program; an integration part for converting the access request code in the application program into a collective access request code for collectively issuing a plurality of server processing requests corresponding to a plurality of job requests; a multiplexing part for converting the processing code in the application program into a multiplexed code for executing multiple processing corresponding to the plurality of job requests; and an output part for outputting, as the batch processing program, the application programs that the integration part and the multiplexing part have processed.
COPYRIGHT: (C)2010,JPO&INPIT

Abstract translation: 要解决的问题：将现有的应用程序转换为批处理程序，以集体处理多个作业请求。 解决方案：转换器包括：代码识别部分，用于识别包括用于发出服务器处理请求的请求代码以用于请求对另一个服务器的处理的部分，以及包括用于执行服务器处理以外的任何处理的处理代码的部分 申请程序中的请求; 用于将应用程序中的访问请求代码转换为用于集体发布与多个作业请求相对应的多个服务器处理请求的集体访问请求代码的集成部分; 用于将应用程序中的处理代码转换为用于执行与多个作业请求相对应的多个处理的多路复用代码的复用部分; 以及输出部，其作为批量处理程序输出积分部和多路复用部已经处理的应用程序。 版权所有（C）2010，JPO＆INPIT

公开(公告)号：JP2006260067A

公开(公告)日：2006-09-28

申请号：JP2005075672

申请日：2005-03-16

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： YASUE TOSHIAKI ,  KOMATSU HIDEAKI

IPC: G06F12/00 ,  G06F3/06 ,  G06F12/08

CPC classification number: G06F9/383 ,  G06F9/3832

Abstract: PROBLEM TO BE SOLVED: To efficiently preread data in advance of data reading by a program. SOLUTION: This lookahead device prereading data from a file to a buffer in advance of the reading of the data by the program has: a history recording part recording a history of the data reading issued during execution of the program; a lookahead generation part generating a plurality of pieces of the prereading corresponding to a plurality of pieces of the data reading recorded in the history; a lookahead procedure determination part determining execution order of the plurality of pieces of the prereading on the basis of the history; and a prefetch part executing each of the plurality of pieces of the prereading in the execution order according as the program is executed after the determination of the execution order. COPYRIGHT: (C)2006,JPO&NCIPI

Abstract translation: 要解决的问题：通过程序有效地预读数据。 解决方案：在程序读取数据之前，将数据从文件预读入缓冲器的前瞻设备具有：记录程序执行期间发布的数据读取历史的历史记录部分; 产生与记录在历史中的多条数据读取相对应的多条预读的前视生成部分; 根据所述历史，确定所述多个所述预读的执行顺序的前瞻程序确定部; 以及预取部分，在执行顺序的确定之后，按照执行程序执行执行顺序中的多个预处理中的每一个。 版权所有（C）2006，JPO＆NCIPI

公开(公告)号：JP2005293386A

公开(公告)日：2005-10-20

申请号：JP2004109650

申请日：2004-04-02

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： KOSEKI SATOSHI ,  TACHIBORI MICHIAKI ,  ISHIZAKI KAZUAKI ,  KOMATSU HIDEAKI

IPC: G06F9/45 ,  G06F17/22 ,  H03M7/00

CPC classification number: G06F17/2264 ,  G06F17/2217

Abstract: PROBLEM TO BE SOLVED: To provide a compiler, a compiler program, a recording medium, a control method and a central processor which realize optimized conversion of a character code system. SOLUTION: The compiler optimizes the conversion of the character code system of characters to be stored in a character variable in an object program to be optimized and is provided with: a conversion instruction generation part which reads characters of the character variable written by a first character code system, converts the characters from the first character code system into a second character code system and generates a conversion instructions to be stored in the character variable prior to each of a plurality of processings using the above read characters in the second character code system; and a conversion instruction removal part which removes the conversion instructions about each conversion instruction generated by the conversion instruction generation part when the characters in the second character code system are stored in the character variable in all execution paths to be executed prior to the conversion instructions. COPYRIGHT: (C)2006,JPO&NCIPI

Abstract translation: 要解决的问题：提供实现字符代码系统的优化转换的编译器，编译程序，记录介质，控制方法和中央处理器。 解决方案：编译器优化要存储在要优化的对象程序中的字符变量中的字符的字符代码系统的转换，并且具有：转换指令生成部，其读取由 第一字符代码系统，将来自第一字符代码系统的字符转换为第二字符代码系统，并且在使用第二字符中的上述读取字符的多个处理之前，生成要存储在字符变量中的转换指令 代码系统; 以及转换指令去除部，其在第二字符代码系统中的字符被存储在转换指令之前执行的所有执行路径中的字符变量中时，将转换指令生成部分生成的每个转换指令移除。 版权所有（C）2006，JPO＆NCIPI

公开(公告)号：JP2004265279A

公开(公告)日：2004-09-24

申请号：JP2003056612

申请日：2003-03-04

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： KAWAHITO MOTOHIRO ,  KOMATSU HIDEAKI

IPC: G06F9/45

CPC classification number: G06F8/41

Abstract: PROBLEM TO BE SOLVED: To optimize a program by changing the execution order of instructions. SOLUTION: This compiler device for optimizing a program by changing the execution order of instructions is provided with a replaceability deciding part for deciding whether or not a first instruction included in a first instruction column and a second instruction included in a second instruction column to be executed the next to the first instruction column can be replaced with a common processing instruction group including a common processing instruction to process at least every portion of processing in accordance with the first instruction and the second instruction together, a common processing instruction group generating part for generating a common processing instruction group in a first instruction column instead of the first instruction when it is decided that those instructions can be replaced by the replaceability deciding part and an instruction inserting part for inserting the second instruction into a third instruction column, being an instruction column other than a first instruction column, succeeding to which a second instruction column is executed. COPYRIGHT: (C)2004,JPO&NCIPI

Abstract translation: 要解决的问题：通过更改指令的执行顺序来优化程序。 解决方案：用于通过改变指令的执行顺序来优化程序的编译器装置被提供有可替换性判定部分，用于判定包括在第一指令列中的第一指令和包括在第二指令列中的第二指令 要执行的第一指令列的下一个可以由包括公共处理指令的公共处理指令组替换，以便根据第一指令和第二指令一起处理至少每个处理部分，公共处理指令组生成 当决定这些指令可被替换性判定部分代替时，用于在第一指令列而不是第一指令中生成公共处理指令组的部分​​，以及用于将第二指令插入第三指令列的指令插入部分， 一个除a之外的指令列 第一指令列，其后执行第二指令列。 版权所有（C）2004，JPO＆NCIPI

公开(公告)号：JP2003280919A

公开(公告)日：2003-10-03

申请号：JP2002069221

申请日：2002-03-13

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーション

Inventor： ISHIZAKI KAZUAKI ,  INAGAKI TATSUSHI ,  KOMATSU HIDEAKI

IPC: G06F9/45

CPC classification number: G06F8/445

Abstract: PROBLEM TO BE SOLVED: To perform instruction movement for speculative execution while securing shortening of execution time to exception dependence for hardware- initiated potentially exception instructions (H-PEI) and software-initiated potentially exception instructions (S-PEI) inserted before the H-PEI, in a device which compiles a program described in a type safe language such as Java. SOLUTION: A dependence graph discriminating an exception dependent arc from other dependence arcs such as a control dependence arc or a data dependence arc is created. As to the fastest execution start time of H-PEI, it is examined which case is faster, execution through the exception dependence arc or execution not through the exception dependence arc. If the latter case is faster, the instruction movement for the speculative execution for the instruction sequence including the H-PEI is performed. COPYRIGHT: (C)2004,JPO

Abstract translation: 要解决的问题：执行指令移动以推测执行，同时确保将执行时间缩短到针对硬件启动的潜在异常指令（H-PEI）和软件启动的潜在异常指令（S-PEI）的异常依赖 H-PEI，在编译以类型安全语言（如Java）描述的程序的设备中。 解决方案：创建一个依赖图来区分异常依赖弧与其他依赖弧，如控制相关弧或数据相关弧。 对于H-PEI的最快执行开始时间，检查哪种情况更快，通过异常依赖弧执行或不通过异常依赖弧执行。 如果后一种情况较快，则执行用于包括H-PEI的指令序列的推测执行的指令移动。 版权所有（C）2004，JPO