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    32.
    发明专利
    未知

    公开(公告)号：DE3482881D1

    公开(公告)日：1990-09-06

    申请号：DE3482881

    申请日：1984-12-04

    Applicant: IBM

    Inventor： VINAL ALBERT WATSON

    IPC: G11B5/127 ,  G11B5/33 ,  G11B5/39 ,  G11B19/04

    Abstract: 57 An improved read-write head for twin track vertical magnetic recording is described. Inductive, solid state, or magneto-resistive sensors may all be employed with the new read-write head structure. A preferred embodiment utilizing a magneto-resistive coupled film sensor for read back which saturates to allow writing is disclosed.

    STABILIZED MAGNETICALLY SENSITIVE AVALANCHE TRANSISTOR
    34.
    发明专利
    STABILIZED MAGNETICALLY SENSITIVE AVALANCHE TRANSISTOR 未知

    公开(公告)号：DE3166664D1

    公开(公告)日：1984-11-22

    申请号：DE3166664

    申请日：1981-03-06

    Applicant: IBM

    Inventor： VINAL ALBERT WATSON

    IPC: H01L27/22 ,  G01R33/06 ,  H01L29/68 ,  H01L29/82 ,  H01L29/868 ,  H01L43/06 ,  H01L29/90

    Abstract: A new semiconductive device for sensing uniaxial magnetic fields is described. The sensor is essentially a dual collector lateral bipolar transistor operated in the avalanche region. Each of the collectors exhibits two space charge resistance effects. One effect produces a negative resistance and the other produces a positive resistance. When the two space charge resistances are carefully balanced, a net zero collector resistance is achieved. A balanced condition can be maintained for a broad range of collector currents. A vertical VI property is thereby achieved. It has been found that the positive space charge resistance characteristic is inversely proportional to the ionization area and that the negative component is proportional to the area in the avalanche zone at each collector. It has been found that a magnetic field can modulate the ionization areas at the collector junctions. The area modulated results in modulation of the positive and negative space charge resistances at each collector and a resultant shift in the avalanche voltage occurs for each collector. A differential output may be obtained since the modulation effect operates oppositely on each of the collector junction areas. This mechanism accounts for the linear and differential magnetoresistive behavior of the device.

    DEPLETION WIDTH MODULATION EFFECT FIELD SENSOR
    36.
    发明专利
    DEPLETION WIDTH MODULATION EFFECT FIELD SENSOR 未知

    公开(公告)号：AU3630278A

    公开(公告)日：1979-11-22

    申请号：AU3630278

    申请日：1978-05-19

    Applicant: IBM

    Inventor： VINAL ALBERT WATSON

    IPC: G01R33/09 ,  G01R29/08 ,  G01R33/06 ,  G11B5/33 ,  H01L29/10 ,  H01L29/76 ,  H01L29/78 ,  H01L29/80 ,  H01L29/82 ,  H01L43/00 ,  H01L43/06 ,  H01L29/36 ,  H01L49/00 ,  H01L21/265

    Abstract: A high sensitivity, low noise, broad bandwidth channel conduction field sensor device is described. The conductive channel is configured to create an exceptionally narrow, undepleted conduction channel of approximately filamentary form. The filamentary conductive channel so formed is provided with a source at one end of the channel and two or more laterally spaced drains at the other end thereof. Electric or magnetic fields may be utilized to deflect a stream of charge carriers traversing the conductive channel from the source toward the drains utilizing the depletion width modulation effect of the fields upon the boundaries defining the conductive channel portion. Modulation of the depletion zone width and depth along the channel sides effectively moves the stream of carriers and the conductive channel area to overlap one drain more than another. This develops a differential drain current balance which can be utilized to provide an output signal. Width and length criteria for defining a filamentary channel structure are described for the ultimate desired configuration and size which are to be obtained. As noted, operation of the device is based upon modulation of the width and depth of the depletion zone boundaries defining the conductive channel. An increased signal output is obtained by reducing the width of the channel to eliminate excess carriers normally found in wide channel devices and, further, by making the depletion zones as large a portion of the total channel width as can be obtained.

    37.
    发明专利
    未知

    公开(公告)号：CH614080A5

    公开(公告)日：1979-10-31

    申请号：CH1181276

    申请日：1976-09-17

    Applicant: IBM

    Inventor： VINAL ALBERT WATSON

    IPC: G06K7/10 ,  G06K7/016 ,  G11B20/14 ,  H03K13/34

    Abstract: 1522895 Decoding digital data signals INTERNATIONAL BUSINESS MACHINES CORP 31 Aug 1976 [29 Oct 1975] 36049/76 Headings G4C and G4M A decoding method of, and apparatus for use in decoding a generalized self-clocking data stream is described. The data stream may consist of electrical pulses from a communications line or be derived by magnetic or optical scanning of a recording medium. The self-clocking code employed may be F2F, S2S, SKS, phase-shift or delta-distance codes. In each of the codes data events (positive transitions) and control events (negative transitions) are interleaved on a one-for-one basis; corresponding to this, "bars" (positive data) and "spaces" (negative data) are also interleaved on a one-for-one basis. If, as in all the self-clocking codes mentioned, there exists a minimum bar or space width, and P possible bar or space widths greater than the minimum (P being 1 in most cases), it is shown that a bar-space or space-bar pair can have 2P + 1 possible widths. Based upon these 2P + 1 possibilities, and on a reference width supplied directly to a decoder apparatus or obtained by scanning a bar-space or a space-bar pair in a preamble stream, search gates are then erected in the data steam at the possible pulse positions and, depending upon the actual pulse positions, the data content of the data stream is obtained. Formulae are given for the positions of the various search gates and for velocity and acceleration corrections thereof. The reference width may be resealed for use in each succeeding cell (containing one data event and one control event). In Figs. 10A, 10B, 10C, counters 3, 4 and 5 count clock pulses from a source 1 at different rates. The reference width is obtained from a preamble stream and stored at 16. Counters 3, 4 and 5 count up to their various maximum counts (all equal) at various times and if, at a particular time, an X (data) signal occurs in a search gate, the contents of the appropriate counter are fed to the store 16 to overwrite its present contents. A counter 18 counts down from the contents of the store 16 to zero, each counting down of the counter 18 to zero representing a subdivision of a cell. Following each such counting down to zero of the counter 18, it is recharged from the store 18 and counting down to zero again proceeds. A shift register 23 stores a sequence of zeroes representing the number of times the counter 18 has counted down to zero, and logic circuitry 25-32 determines in which subdivision of the cell a data signal occurs. Following each such detection of a data signal, the store 16 is loaded with the current contents of the appropriate counter 3, 4 or 5 as an updated reference width, this providing an inbuilt velocity correction. A circuit identical to that of Figs. 10A, 10B, 10C is provided for the control (Y) signals, the subdivisions of the cells for data signals and control signals being determined and transmitted to a logic matrix, Fig. 13A (not shown) to decode the data signals. An error signal is generated if no data or control signals are detected in any given cell. In the previous embodiment separate circuitry is provided for the data signals and the control signals, search gates for each being erected relative to the preceding like signals; in a modification, Figs. 16, 17 (not shown) each search gate is erected relative to the preceding signal (of either type), and common circuitry for the data signals and the control signals is employed.

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