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    Integrated set-top box
    31.
    发明申请
    Integrated set-top box 有权
    集成机顶盒

    公开(公告)号：US20060026661A1

    公开(公告)日：2006-02-02

    申请号：US11133237

    申请日：2005-05-20

    Applicant: Donald McMullin ,  Lawrence Burns ,  Leonard Dauphinee ,  Ramon Gomez ,  Loke Tan

    Inventor： Donald McMullin ,  Lawrence Burns ,  Leonard Dauphinee ,  Ramon Gomez ,  Loke Tan

    IPC: H04N7/173

    CPC classification number: H04N21/6168 ,  H04N7/17309 ,  H04N21/40

    Abstract: The present invention is an integrated set-top box. In one embodiment, the up-stream path and the down-stream path are integrated on a common semiconductor substrate. The down-stream path can include a TV tuner and a digital receiver portion that is integrated on the common semiconductor substrate with a power amplifier of the up-stream path. In another embodiment, the TV tuner is implemented on a first semiconductor substrate and the digital receiver portion and the power amplifier are configured on a second semiconductor substrate. However, the two substrates are mounted on a common carrier so that the set-top box appears to be a single chip configuration to the user.

    Abstract translation: 本发明是一种集成的机顶盒。 在一个实施例中，上游路径和下游路径被集成在公共半导体衬底上。 下行路径可以包括集成在公共半导体衬底上的TV调谐器和数字接收器部分，其具有上行路径的功率放大器。 在另一个实施例中，TV调谐器被实现在第一半导体衬底上，并且数字接收器部分和功率放大器配置在第二半导体衬底上。 然而，两个基板安装在公共载体上，使得机顶盒看起来是用户的单芯片配置。

    Highly integrated single chip set-top box
    32.
    发明申请
    Highly integrated single chip set-top box 失效
    高度集成的单芯片机顶盒

    公开(公告)号：US20060026657A1

    公开(公告)日：2006-02-02

    申请号：US11187009

    申请日：2005-07-22

    Applicant: Martin Kuhlmann ,  Ramon Gomez ,  Loke Tan

    Inventor： Martin Kuhlmann ,  Ramon Gomez ,  Loke Tan

    IPC: H04N7/173 ,  H04N7/16

    CPC classification number: H04N21/4383 ,  H04N21/41 ,  H04N21/426

    Abstract: A highly integrated set-top box is implemented on a single semiconductor substrate. For instance, an analog RF tuner is implemented on the same substrate with a digital receiver, and audio-video back-end circuits. The single chip set-top box can be used for satellite, cable, internet, or terrestrial TV applications, or other applications. As a result, the substrate area, assembly time, and associated costs per chip are reduced.

    Abstract translation: 高度集成的机顶盒在单个半导体衬底上实现。 例如，模拟RF调谐器在与数字接收机和音频 - 视频后端电路相同的衬底上实现。 单芯片机顶盒可用于卫星，有线，互联网或地面电视应用或其他应用。 结果，减少了每个芯片的基板面积，组装时间和相关成本。

    Multiple layer inductor and method of making the same
    35.
    发明申请
    Multiple layer inductor and method of making the same 有权
    多层电感及其制作方法

    公开(公告)号：US20050116802A1

    公开(公告)日：2005-06-02

    申请号：US11031072

    申请日：2005-01-10

    Applicant: Ramon Gomez ,  Lawrence Burns

    Inventor： Ramon Gomez ,  Lawrence Burns

    IPC: H01F17/00 ,  H01F27/36 ,  H01F5/00

    CPC classification number: H01F17/0013 ,  H01F27/362

    Abstract: A multiple layer inductor has a first spiral conductive pattern disposed on a first surface; a second spiral conductive pattern disposed on a second surface; a continuing interconnection coupled to the first and second spiral conductive patterns; an interface coupled to the first and second spiral conductive patterns; and a conductive shield pattern disposed on a third surface that is adjacent to the second surface. The interface includes a first terminal disposed on the first surface that is coupled to the first spiral conductive pattern. The interface also includes a second terminal that is disposed on the first surface and coupled to said second spiral conductive pattern.

    Abstract translation: 多层电感器具有设置在第一表面上的第一螺旋导电图案; 设置在第二表面上的第二螺旋导电图案; 耦合到所述第一和第二螺旋导电图案的连续互连; 耦合到第一和第二螺旋导电图案的界面; 以及设置在与第二表面相邻的第三表面上的导电屏蔽图案。 接口包括设置在第一表面上的第一端子，该第一端子耦合到第一螺旋导电图案。 该界面还包括第二端子，该第二端子设置在第一表面上并且耦合到所述第二螺旋导电图案。

    Printed bandpass filter for a double conversion tuner
    36.
    发明申请
    Printed bandpass filter for a double conversion tuner 失效
    双转换调谐器的带通滤波器

    公开(公告)号：US20050093661A1

    公开(公告)日：2005-05-05

    申请号：US10994633

    申请日：2004-11-23

    Applicant: Ramon Gomez ,  Lawrence Burns ,  Sung-Hsien Chang ,  Carl Pobanz

    Inventor： Ramon Gomez ,  Lawrence Burns ,  Sung-Hsien Chang ,  Carl Pobanz

    IPC: H01P1/203 ,  H05K1/16 ,  H01P1/20

    CPC classification number: H01P7/00 ,  H01P1/20 ,  H01P1/203 ,  H01P1/20381 ,  H05K1/165

    Abstract: A printed bandpass filter is mounted on a precision substrate to eliminate the need for post-fabrication tuning. The filter input is capacitively coupled to a series of quarter wavelength resonators and the filter output. The quarter wavelength resonators are printed as spirals to reduce filter size. The resonators define the bandpass characteristics of the filter. The filter also weakly couples the input signal to the filter output in a manner to cancel the signal image. Mechanical clips mitigate thermal stress on solder connections when the precision substrate is mounted on a second printed circuit board.

    Abstract translation: 印刷的带通滤波器安装在精密基板上，以消除对制造后调谐的需要。 滤波器输入电容耦合到一系列四分之一波长谐振器和滤波器输出。 四分之一波长谐振器被打印为螺旋线以减小滤波器尺寸。 谐振器定义滤波器的带通特性。 滤波器也以以消除信号图像的方式将输入信号弱耦合到滤波器输出。 当精密基板安装在第二印刷电路板上时，机械夹可减轻焊接连接处的热应力。

    Compensation for Lane Imbalance in a Multi-Lane Analog-To-Digital Converter (ADC)
    38.
    发明申请
    Compensation for Lane Imbalance in a Multi-Lane Analog-To-Digital Converter (ADC) 有权
    多通道模数转换器（ADC）中通道不平衡的补偿

    公开(公告)号：US20140002284A1

    公开(公告)日：2014-01-02

    申请号：US13553017

    申请日：2012-07-19

    Applicant: Loke TAN ,  Steven Jaffe ,  Hong Liu ,  Lin He ,  Randall Perlow ,  Peter Cangiane ,  Ramon Gomez ,  Giuseppe Cusmai

    Inventor： Loke TAN ,  Steven Jaffe ,  Hong Liu ,  Lin He ,  Randall Perlow ,  Peter Cangiane ,  Ramon Gomez ,  Giuseppe Cusmai

    IPC: H03M1/06

    CPC classification number: H03M1/1052 ,  H03M1/1215

    Abstract: Various multi-lane ADCs are disclosed that substantially compensate for impairments present within various signals that result from various impairments, such as phase offset, amplitude offset, and/or DC offset to provide some examples, such that their respective digital output samples accurately represent their respective analog inputs. Generally, the various multi-lane ADCs determine various statistical relationships, such as various correlations to provide an example, between these various signals and various known calibration signals to quantify the phase offset, amplitude offset, and/or DC offset that may be present within the various signals. The various multi-lane ADCs adjust the various signals to substantially compensate for the phase offset, amplitude offset, and/or DC offset based upon these various statistical relationships such that their respective digital output samples accurately represent their respective analog inputs.

    Abstract translation: 公开了各种多通道ADC，其基本上补偿由各种损伤产生的各种信号中存在的损伤，例如相位偏移，幅度偏移和/或DC偏移，以提供一些示例，使得它们各自的数字输出样本准确地表示它们 各自的模拟输入。 通常，各种多通道ADC确定各种统计关系，例如各种相关性，以提供这些各种信号之间的示例，以及各种已知的校准信号，以量化可能存在的相位偏移，幅度偏移和/或DC偏移 各种信号。 各种多通道ADC基于这些各种统计关系调整各种信号以基本上补偿相位偏移，幅度偏移和/或DC偏移，使得它们各自的数字输出样本精确地表示它们各自的模拟输入。

    Multi-tuner variable low IF receiver for multi-channel applications
    39.
    发明授权
    Multi-tuner variable low IF receiver for multi-channel applications 有权
    用于多通道应用的多调谐器可变低IF接收器

    公开(公告)号：US08107916B2

    公开(公告)日：2012-01-31

    申请号：US12553701

    申请日：2009-09-03

    Applicant: Francesco Gatta ,  Ramon Gomez ,  Leonard Dauphinee ,  Young Joon Shin ,  Hanli Zou ,  Massimo Brandolini ,  Giuseppe Cusmai

    Inventor： Francesco Gatta ,  Ramon Gomez ,  Leonard Dauphinee ,  Young Joon Shin ,  Hanli Zou ,  Massimo Brandolini ,  Giuseppe Cusmai

    IPC: H04B1/10 ,  H04K3/00

    CPC classification number: H04N5/455 ,  H04N5/45 ,  H04N21/4263 ,  H04N21/4382

    Abstract: Systems and methods for demodulating a plurality of contiguous channels contained within a bandlimited portion of a radio-frequency (RF) input signal are provided. In an embodiment, the bandlimited portion of the RF input signal is down-converted to baseband. After down-conversion, the bandlimited portion overlaps at baseband with a mirror image of the bandlimited portion. The plurality of contiguous channels within the down-converted signal similarly overlap at baseband and subsequently occupy a bandwidth substantially equal to half that required before down-converting. Image rejection is performed in the digital domain to recover each of the plurality of overlapping channels.

    Abstract translation: 提供了用于解调包含在射频（RF）输入信号的频带限制部分内的多个连续信道的系统和方法。 在一个实施例中，RF输入信号的频带限制部分被下变频为基带。 在下转换之后，频带限制部分与带限制部分的镜像重叠在基带处。 下变频信号内的多个相邻信道类似地在基带处重叠，并且随后占据基本上等于下变频所需的一半的带宽。 在数字域中进行图像抑制以恢复多个重叠信道中的每一个。

    Integrated Set-Top Box with Daisy-Chaining
    40.
    发明申请
    Integrated Set-Top Box with Daisy-Chaining 审中-公开
    带菊花链的集成机顶盒

    公开(公告)号：US20100306814A1

    公开(公告)日：2010-12-02

    申请号：US12504541

    申请日：2009-07-16

    Applicant: Francesco GATTA ,  Leonard Dauphinee ,  Ramon Gomez ,  Joseph L. Laskowski

    Inventor： Francesco GATTA ,  Leonard Dauphinee ,  Ramon Gomez ,  Joseph L. Laskowski

    IPC: H04N7/173

    CPC classification number: H04N5/44

    Abstract: The present invention is an integrated set-top box having daisy-chaining capability. The set-top box includes a down-stream path having a tuner and a digital receiver portion and an up-stream path having a power amplifier. In one embodiment, the tuner, digital receiver, and power amplifier can all be disposed on a common substrate. In another embodiment, the tuner can be disposed on a first substrate, and the digital receiver and the power amplifier can be disposed on a second substrate. The set-top box includes a daisy-chain buffer having an input coupled to an input of the tuner and having an output coupled to an input of another receiving entity such as another set-top box, tuner, cable, etc., where the daisy-chain buffer is configured to provide a signal to drive the receiving entity.

    Abstract translation: 本发明是具有菊花链接能力的集成机顶盒。 机顶盒包括具有调谐器和数字接收机部分的下行路径以及具有功率放大器的上行路径。 在一个实施例中，调谐器，数字接收机和功率放大器都可以设置在公共基板上。 在另一个实施例中，调谐器可以设置在第一基板上，并且数字接收器和功率放大器可以设置在第二基板上。 机顶盒包括菊花链缓冲器，其具有耦合到调谐器的输入的输入，并且具有耦合到诸如另一个机顶盒，调谐器，电缆等的另一个接收实体的输入的输出，其中 菊花链缓冲器被配置为提供信号来驱动接收实体。

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