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公开(公告)号:US20220415801A1
公开(公告)日:2022-12-29
申请号:US17902319
申请日:2022-09-02
Applicant: Samsung Electronics Co., Ltd. , UNIST (ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)
Inventor: Hyeonjin SHIN , Minhyun LEE , Changseok LEE , Hyeonsuk SHIN , Seokmo HONG
IPC: H01L23/532 , H01L23/522
Abstract: An interconnect structure and an electronic apparatus including the interconnect structure are provided. The interconnect structure includes a conductive layer; a dielectric layer configured to surround at least a part of the conductive layer; and a diffusion barrier layer disposed between the conductive layer and the dielectric layer and configured to limit and/or prevent a conductive material of the conductive layer from diffusing into the dielectric layer, and at least one of the dielectric layer and the diffusion barrier layer includes a boron nitride layer of a low dielectric constant.
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公开(公告)号:US20220316052A1
公开(公告)日:2022-10-06
申请号:US17711147
申请日:2022-04-01
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sangwon KIM , Kyung-Eun BYUN , Yeonchoo CHO , Keunwook SHIN , Eunkyu LEE , Changseok LEE , Hyunjae SONG , Hyeonjin SHIN , Jungsoo YOON , Soyoung LEE , Hyunseok LIM
IPC: C23C16/26 , H01L29/45 , H01L21/285 , C23C16/511 , C23C16/505 , C23C16/02
Abstract: Provided are nanocrystalline graphene and a method of forming the same. The nanocrystalline graphene may include a plurality of grains formed by stacking a plurality of graphene sheets and has a grain density of about 500 ea/μm2 or higher and a root-mean-square (RMS) roughness in a range of about 0.1 or more to about 1.0 or less. When the nanocrystalline graphene has a grain density and a RMS roughness with these ranges, nanocrystalline graphene capable of covering the entirety of a large area on a substrate as a thin layer may be provided.
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公开(公告)号:US20220173221A1
公开(公告)日:2022-06-02
申请号:US17398363
申请日:2021-08-10
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hyeonjin SHIN , Sangwon KIM , Kyung-Eun BYUN , Hyunjae SONG , Keunwook SHIN , Eunkyu LEE , Changseok LEE , Yeonchoo CHO , Taejin CHOI
IPC: H01L29/45 , H01L27/108 , H01L29/15 , H01L29/40
Abstract: An interconnect structure for reducing a contact resistance, an electronic device including the same, and a method of manufacturing the interconnect structure are provided. The interconnect structure includes a semiconductor layer including a first region having a doping concentration greater than a doping concentration of a peripheral region of the semiconductor layer, a metal layer facing the semiconductor layer, a graphene layer between the semiconductor layer and the metal layer, and a conductive metal oxide layer between the graphene layer and the semiconductor and covering the first region.
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公开(公告)号:US20220157947A1
公开(公告)日:2022-05-19
申请号:US17398515
申请日:2021-08-10
Applicant: Samsung Electronics Co., Ltd. , UNIST (ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)
Inventor: Minsu SEOL , Hyeonsuk SHIN , Hyeonjin SHIN , Hyuntae HWANG , Changseok LEE , Seongin YOON
Abstract: Provided are a black phosphorus-two dimensional material complex and a method of manufacturing the black phosphorus-two dimensional material complex. The black phosphorus-two dimensional material complex includes: first and second two-dimensional material layers, which each have a two-dimensional crystal structure and are coupled to each other by van der Waals force; and a black phosphorus sheet which between the first and second two-dimensional material layers and having a two-dimensional crystal structure in which a plurality of phosphorus atoms are covalently bonded.
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公开(公告)号:US20210355582A1
公开(公告)日:2021-11-18
申请号:US17318238
申请日:2021-05-12
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hyeonjin SHIN , Sangwon KIM , Kyung-Eun BYUN , Eunkyu LEE , Changhyun KIM , Changseok LEE
IPC: C23C16/50 , C23C16/26 , C23C16/32 , C01B32/182 , C01B21/064 , C01B25/00
Abstract: Provided are a conductive structure and a method of controlling a work function of metal. The conductive structure includes a conductive material layer including metal and a work function control layer for controlling a work function of the conductive structure by being bonded to the conductive material layer. The work function control layer includes a two-dimensional material with a defect.
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公开(公告)号:US20210313169A1
公开(公告)日:2021-10-07
申请号:US17208216
申请日:2021-03-22
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hyunjae SONG , Kaoru YAMAMOTO , Changhyun KIM , Shuji MORIYA , Jungsoo YOON , Soyoung LEE , Changseok LEE
IPC: H01L21/02 , H01L21/428 , H01L21/3213 , H01J37/32
Abstract: Provided are apparatuses for manufacturing semiconductor devices. An apparatus includes a reaction chamber having a stage to be loaded on a substrate, wherein set plasma is formed over the stage, a plurality of gas supply lines connected to the reaction chamber, flow controllers formed on the plurality of gas supply lines, respectively, to control the amount of a gas supplied to the reaction chamber, and a gas splitter configured to supply a mixed gas to the flow controllers. The apparatus may be a thin film deposition apparatus using plasma and further include a flow control unit connected to the gas splitter and a gas supply source connected to the flow control unit.
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公开(公告)号:US20190110219A1
公开(公告)日:2019-04-11
申请号:US16212876
申请日:2018-12-07
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Hyunsuk MIN , Jieun KIM , Yunjae LIM , Changseok LEE , Sangsun CHOI , Jaeeun KANG , Junho KOH , Jongyoub RYU , Yonghyun LIM
Abstract: The present disclosure relates to a sensor network, Machine Type Communication (MTC), Machine-to-Machine (M2M) communication, and technology for Internet of Things (IoT). The present disclosure may be applied to intelligent services based on the above technologies, such as smart home, smart building, smart city, smart car, connected car, health care, digital education, smart retail, security and safety services.A method of managing an electronic device is provided, which includes determining a management target device, selecting at least one measurement device based on the determined management target device, transmitting an operation command to the management target device, receiving measurement information from the at least one measurement device, and determining a state of the management target device based on the received measurement information.
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公开(公告)号:US20170164224A1
公开(公告)日:2017-06-08
申请号:US15368870
申请日:2016-12-05
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Hyunsuk MIN , Jieun KIM , Yunjae LIM , Changseok LEE , Sangsun CHOI , Jaeeun KANG , Junho KOH , Jongyoub RYU , Yonghyun LIM
Abstract: The present disclosure relates to a sensor network, Machine Type Communication (MTC), Machine-to-Machine (M2M) communication, and technology for Internet of Things (IoT). The present disclosure may be applied to intelligent services based on the above technologies, such as smart home, smart building, smart city, smart car, connected car, health care, digital education, smart retail, security and safety services.A method of managing an electronic device is provided, which includes determining a management target device, selecting at least one measurement device based on the determined management target device, transmitting an operation command to the management target device, receiving measurement information from the at least one measurement device, and determining a state of the management target device based on the received measurement information.
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公开(公告)号:US20240096415A1
公开(公告)日:2024-03-21
申请号:US18335492
申请日:2023-06-15
Applicant: Samsung Electronics Co., Ltd.
Inventor: Changseok LEE , Minhyun LEE , Seunggeol NAM
IPC: G11C16/04 , H01L29/10 , H01L29/18 , H01L29/20 , H10B41/10 , H10B41/27 , H10B41/35 , H10B43/10 , H10B43/27 , H10B43/35
CPC classification number: G11C16/0483 , H01L29/1033 , H01L29/18 , H01L29/2003 , H10B41/10 , H10B41/27 , H10B41/35 , H10B43/10 , H10B43/27 , H10B43/35
Abstract: A nonvolatile memory device may include a channel layer extending in a first direction; a plurality of gate electrodes and a plurality of spacers alternately arranged with each other in the first direction, and a gate insulating layer extending in the first direction. Each of the plurality of gate electrodes and each of the plurality of spacers may extend in a second direction crossing the first direction. The gate insulating layer may extend in the first direction. The gate insulating layer may be between the channel layer and the plurality of gate electrodes. The channel layer may include a two-dimensional semiconductor material having an electrically p-type property.
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公开(公告)号:US20230238329A1
公开(公告)日:2023-07-27
申请号:US18158233
申请日:2023-01-23
Applicant: Samsung Electronics Co., Ltd.
Inventor: Keunwook SHIN , Sangwon KIM , Kyung-Eun BYUN , Joungeun YOO , Eunkyu LEE , Changseok LEE , Alum JUNG
IPC: H01L23/532 , H01L23/528
CPC classification number: H01L23/53276 , H01L23/528 , H01L23/53257 , H01L23/53214 , H01L23/53228 , H01L23/53242
Abstract: An interconnect structure may include a dielectric layer including a trench, a conductive wiring including graphene filling an inside of the trench, and a liner layer in contact with at least one surface of the conductive wiring and including a metal.
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