中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

50 records (took 0.027 seconds)

    VERTICAL OUTPUT COUPLERS FOR PHOTONIC DEVICES
    34.
    发明申请
    VERTICAL OUTPUT COUPLERS FOR PHOTONIC DEVICES 有权
    用于光电器件的垂直输出耦合器

    公开(公告)号：US20160306110A1

    公开(公告)日：2016-10-20

    申请号：US15133898

    申请日：2016-04-20

    Applicant: Skorpios Technologies, Inc.

    Inventor： Damien Lambert

    IPC: G02B6/125 ,  G02B6/132 ,  G02B6/136

    CPC classification number: G02B6/125 ,  G02B6/132 ,  G02B6/136 ,  G02B2006/12061 ,  G02B2006/12097 ,  G02B2006/12104 ,  G02B2006/12147 ,  G02B2006/12169

    Abstract: A method forms a vertical output coupler for a waveguide that propagates light along a horizontal propagation direction, through a waveguide material that overlies a buried oxide layer. The method includes etching the waveguide to remove a portion of the waveguide. The etching forms at least a first plane that is at an edge of the waveguide, is adjacent to the removed portion of the waveguide, and is tilted at a vertical angle between 20 degrees and 70 degrees with respect to the propagation direction. The method further includes coating the first tilted plane with a reflective metal to form a mirror, such that the mirror reflects the light into a direction having a vertical component.

    Abstract translation: 一种方法形成用于通过覆盖掩埋氧化物层的波导材料沿着水平传播方向传播光的波导的垂直输出耦合器。 该方法包括蚀刻波导以去除波导的一部分。 蚀刻形成至少在波导的边缘处的第一平面，与波导的去除部分相邻，并且相对于传播方向以20度和70度之间的垂直角度倾斜。 该方法还包括用反射金属涂覆第一倾斜平面以形成反射镜，使得反射镜将光反射成具有垂直分量的方向。

    INTEGRATED PHOTONICS MODE EXPANDER
    35.
    发明申请
    INTEGRATED PHOTONICS MODE EXPANDER 有权
    集成光电模式扩展器

    公开(公告)号：US20160170142A1

    公开(公告)日：2016-06-16

    申请号：US15051348

    申请日：2016-02-23

    Applicant: Skorpios Technologies, Inc.

    Inventor： Damien Lambert ,  Guoliang Li ,  John Zyskind ,  Stephen B. Krasulick

    IPC: G02B6/14 ,  G02B6/136 ,  G02B6/132 ,  G02B6/122

    CPC classification number: G02B6/14 ,  G02B6/1228 ,  G02B6/132 ,  G02B6/136 ,  G02B6/305 ,  G02B2006/12061 ,  G02B2006/12097 ,  G02B2006/12152

    Abstract: A method of fabricating a waveguide mode expander includes providing a substrate including a waveguide, bonding a chiplet including multiple optical material layers in a mounting region adjacent an output end of the waveguide, and selectively removing portions of the chiplet to form tapered stages that successively increase in number and lateral size from a proximal end to a distal end of the chiplet. The first optical material layer supports an input mode substantially the same size as a mode exiting the waveguide. One or more of the overlying layers, when combined with the first layer, support a larger, output optical mode size. Each tapered stage of the mode expander is formed of a portion of a respective layer of the chiplet. The first layer and the tapered stages form a waveguide mode expander that expands an optical mode of light traversing the chiplet.

    Abstract translation: 一种制造波导模式扩展器的方法包括：提供包括波导的基板，在与波导的输出端相邻的安装区域中接合包括多个光学材料层的小芯片，以及选择性地去除所述小芯片的部分以形成逐渐增加的渐变级 从小头的近端到远端的数量和侧向尺寸。 第一光学材料层支持与离开波导的模式基本相同的大小的输入模式。 当与第一层组合时，一个或多个上覆层支持更大的输出光学模式尺寸。 模式扩张器的每个锥形阶段由小杯的相应层的一部分形成。 第一层和锥形阶段形成一个波导模式扩展器，其扩展了穿过小灯的光学模式。

    Etched facet in a multi quantum well structure
    36.
    发明授权
    Etched facet in a multi quantum well structure 有权

    公开(公告)号：US12253714B2

    公开(公告)日：2025-03-18

    申请号：US18179167

    申请日：2023-03-06

    Applicant: Skorpios Technologies, Inc.

    Inventor： Paveen Apiratikul ,  Damien Lambert

    IPC: G02B6/12 ,  G02B6/122 ,  G02B6/136

    Abstract: An exemplary multi quantum well structure may include a silicon platform having a pit formed in the silicon platform, a chip positioned inside the pit, a first waveguide formed in the chip, and a second waveguide formed in the silicon platform. The pit may be defined at least in part by a sidewall and a base. The chip may include a first side and a first recess in the first side. The first side may be defined in part by a first cleaved or diced facet. The first recess may be defined in part by a first etched facet. The first waveguide may be configured to guide an optical beam to pass through the first etched facet. The second waveguide may be configured to guide the optical beam to pass through the sidewall. The second waveguide may be optically aligned with the first waveguide.

    ETCHED FACET IN A MULTI QUANTUM WELL STRUCTURE
    39.
    发明申请
    ETCHED FACET IN A MULTI QUANTUM WELL STRUCTURE 有权

    公开(公告)号：US20220196911A1

    公开(公告)日：2022-06-23

    申请号：US17539474

    申请日：2021-12-01

    Applicant: Skorpios Technologies, Inc.

    Inventor： Paveen Apiratikul ,  Damien Lambert

    IPC: G02B6/12 ,  G02B6/136

    Abstract: An exemplary multi quantum well structure may include a silicon platform having a pit formed in the silicon platform, a chip positioned inside the pit, a first waveguide formed in the chip, and a second waveguide formed in the silicon platform. The pit may be defined at least in part by a sidewall and a base. The chip may include a first side and a first recess in the first side. The first side may be defined in part by a first cleaved or diced facet. The first recess may be defined in part by a first etched facet. The first waveguide may be configured to guide an optical beam to pass through the first etched facet. The second waveguide may be configured to guide the optical beam to pass through the sidewall. The second waveguide may be optically aligned with the first waveguide.

Patent Agency Ranking