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    Integration of an unprocessed, direct-bandgap chip into a silicon photonic device
    31.
    发明授权
    Integration of an unprocessed, direct-bandgap chip into a silicon photonic device 有权
    将未处理的直接带隙芯片集成到硅光子器件中

    公开(公告)号：US09316785B2

    公开(公告)日：2016-04-19

    申请号：US14509914

    申请日：2014-10-08

    Applicant: Skorpios Technologies, Inc.

    Inventor： Stephen B. Krasulick ,  John Dallesasse ,  Amit Mizrahi ,  Timothy Creazzo ,  Elton Marchena ,  John Y. Spann

    IPC: G02B6/12 ,  G02B6/122 ,  H01S5/022 ,  H01S5/00

    CPC classification number: G02B6/1225 ,  G02B6/12004 ,  G02B2006/12176 ,  H01L2224/32225 ,  H01S5/005 ,  H01S5/02252

    Abstract: A composite device for splitting photonic functionality across two or more materials comprises a platform, a chip, and a bond securing the chip to the platform. The platform comprises a base layer and a device layer. The device layer comprises silicon and has an opening exposing a portion of the base layer. The chip, a III-V material, comprises an active region (e.g., gain medium for a laser). The chip is bonded to the portion of the base layer exposed by the opening such that the active region of the chip is aligned with the device layer of the platform. A coating hermitically seals the chip in the platform.

    Abstract translation: 用于在两种或多种材料上分离光子功能的复合器件包括平台，芯片和将芯片固定到平台的接合。 平台包括基层和器件层。 器件层包括硅并且具有露出基底层的一部分的开口。 芯片III-V材料包括有源区（例如，用于激光的增益介质）。 芯片被接合到由开口暴露的基层的部分，使得芯片的有源区域与平台的器件层对准。 涂层在平台上密封芯片。

    INTEGRATION OF AN UNPROCESSED, DIRECT-BANDGAP CHIP INTO A SILICON PHOTONIC DEVICE
    33.
    发明申请
    INTEGRATION OF AN UNPROCESSED, DIRECT-BANDGAP CHIP INTO A SILICON PHOTONIC DEVICE 有权
    将不受约束的直接带状芯片集成到硅光电器件

    公开(公告)号：US20150098676A1

    公开(公告)日：2015-04-09

    申请号：US14509914

    申请日：2014-10-08

    Applicant: Skorpios Technologies, Inc.

    Inventor： Stephen B. Krasulick ,  John Dallesasse ,  Amit Mizrahi ,  Timothy Creazzo ,  Elton Marchena ,  John Y. Spann

    IPC: G02B6/122

    CPC classification number: G02B6/1225 ,  G02B6/12004 ,  G02B2006/12176 ,  H01L2224/32225 ,  H01S5/005 ,  H01S5/02252

    Abstract: A composite device for splitting photonic functionality across two or more materials comprises a platform, a chip, and a bond securing the chip to the platform. The platform comprises a base layer and a device layer. The device layer comprises silicon and has an opening exposing a portion of the base layer. The chip, a III-V material, comprises an active region (e.g., gain medium for a laser). The chip is bonded to the portion of the base layer exposed by the opening such that the active region of the chip is aligned with the device layer of the platform. A coating hermitically seals the chip in the platform.

    Abstract translation: 用于在两种或多种材料上分离光子功能的复合器件包括平台，芯片和将芯片固定到平台的接合。 平台包括基层和器件层。 器件层包括硅并且具有露出基底层的一部分的开口。 芯片III-V材料包括有源区（例如，用于激光的增益介质）。 芯片被接合到由开口暴露的基层的部分，使得芯片的有源区域与平台的器件层对准。 涂层在平台上密封芯片。

    METHOD AND SYSTEM FOR TEMPLATE ASSISTED WAFER BONDING
    34.
    发明申请
    METHOD AND SYSTEM FOR TEMPLATE ASSISTED WAFER BONDING 有权
    用于模板辅助波形粘结的方法和系统

    公开(公告)号：US20140342500A1

    公开(公告)日：2014-11-20

    申请号：US14245191

    申请日：2014-04-04

    Applicant: Skorpios Technologies, Inc.

    Inventor： John Dallesasse ,  Stephen B. Krasulick

    IPC: H01L25/16 ,  H01L23/00 ,  H01L33/00 ,  H01L21/78 ,  H01L31/18

    CPC classification number: H01L25/167 ,  H01L21/78 ,  H01L21/822 ,  H01L23/50 ,  H01L24/97 ,  H01L31/1876 ,  H01L33/005 ,  H01L33/48 ,  H01L33/52 ,  H01L2924/1204 ,  H01L2924/12042 ,  H01L2924/14 ,  H01S5/0217 ,  H01S5/026 ,  H01L2924/00

    Abstract: A method of fabricating a composite semiconductor structure includes providing a substrate including a plurality of devices and providing a compound semiconductor substrate including a plurality of photonic devices. The method also includes dicing the compound semiconductor substrate to provide a plurality of photonic dies. Each die includes one or more of the plurality of photonics devices. The method further includes providing an assembly substrate, mounting the plurality of photonic dies on predetermined portions of the assembly substrate, aligning the substrate and the assembly substrate, joining the substrate and the assembly substrate to form a composite substrate structure, and removing at least a portion of the assembly substrate from the composite substrate structure.

    Abstract translation: 制造复合半导体结构的方法包括提供包括多个器件的衬底并提供包括多个光子器件的化合物半导体衬底。 该方法还包括切割化合物半导体衬底以提供多个光子管芯。 每个管芯包括多个光子器件中的一个或多个。 该方法还包括提供组装衬底，将多个光子模具安装在组装衬底的预定部分上，对准衬底和组装衬底，将衬底和组件衬底接合以形成复合衬底结构，并且移除至少一个 从组合衬底结构的组装衬底的一部分。

    Method and system for template assisted wafer bonding
    35.
    发明授权
    Method and system for template assisted wafer bonding 有权
    模板辅助晶片粘合的方法和系统

    公开(公告)号：US08722464B2

    公开(公告)日：2014-05-13

    申请号：US13869408

    申请日：2013-04-24

    Applicant: Skorpios Technologies, Inc.

    Inventor： John Dallesasse ,  Stephen B. Krasulick

    IPC: H01L21/00

    CPC classification number: H01L25/167 ,  H01L21/78 ,  H01L21/822 ,  H01L23/50 ,  H01L24/97 ,  H01L31/1876 ,  H01L33/005 ,  H01L33/48 ,  H01L33/52 ,  H01L2924/1204 ,  H01L2924/12042 ,  H01L2924/14 ,  H01S5/0217 ,  H01S5/026 ,  H01L2924/00

    Abstract: A method of fabricating a composite semiconductor structure includes providing a substrate including a plurality of devices and providing a compound semiconductor substrate including a plurality of photonic devices. The method also includes dicing the compound semiconductor substrate to provide a plurality of photonic dies. Each die includes one or more of the plurality of photonics devices. The method further includes providing an assembly substrate, mounting the plurality of photonic dies on predetermined portions of the assembly substrate, aligning the substrate and the assembly substrate, joining the substrate and the assembly substrate to form a composite substrate structure, and removing at least a portion of the assembly substrate from the composite substrate structure.

    Abstract translation: 制造复合半导体结构的方法包括提供包括多个器件的衬底并提供包括多个光子器件的化合物半导体衬底。 该方法还包括切割化合物半导体衬底以提供多个光子管芯。 每个管芯包括多个光子器件中的一个或多个。 该方法还包括提供组装衬底，将多个光子模具安装在组装衬底的预定部分上，对准衬底和组装衬底，将衬底和组件衬底接合以形成复合衬底结构，并且移除至少一个 从组合衬底结构的组装衬底的一部分。

    METHOD AND SYSTEM FOR THE MONOLITHIC INTEGRATION OF CIRCUITS FOR MONITORING AND CONTROL OF RF SIGNALS
    36.
    发明申请
    METHOD AND SYSTEM FOR THE MONOLITHIC INTEGRATION OF CIRCUITS FOR MONITORING AND CONTROL OF RF SIGNALS 有权
    用于监视和控制RF信号的电路的单片集成方法和系统

    公开(公告)号：US20140037286A1

    公开(公告)日：2014-02-06

    申请号：US13959107

    申请日：2013-08-05

    Applicant: Skorpios Technologies, Inc.

    Inventor： Stephen B. Krasulick ,  Timothy Creazzo ,  Kalpit Jha ,  Elton Marchena ,  Amit Mizrahi

    IPC: H04B10/556

    CPC classification number: H04B10/5561 ,  H04B10/07955 ,  H04B10/5053 ,  H04B10/564 ,  H04J14/0227 ,  H04L27/2096

    Abstract: A method of operating a BPSK modulator includes receiving an RF signal at the BPSK modulator and splitting the RF signal into a first portion and a second portion that is inverted with respect to the first portion. The method also includes receiving the first portion at a first arm of the BPSK modulator, receiving the second portion at a second arm of the BPSK modulator, applying a first tone to the first arm of the BPSK modulator, and applying a second tone to the second arm of the BPSK modulator. The method further includes measuring a power associated with an output of the BPSK modulator and adjusting a phase applied to at least one of the first arm of the BPSK modulator or the second arm of the BPSK modulator in response to the measured power.

    Abstract translation: 一种操作BPSK调制器的方法包括在BPSK调制器处接收RF信号，并将RF信号分成第一部分和相对于第一部分反相的第二部分。 该方法还包括在BPSK调制器的第一臂处接收第一部分，在BPSK调制器的第二臂处接收第二部分，向BPSK调制器的第一臂应用第一音调，并向第 BPSK调制器的第二臂。 该方法还包括测量与BPSK调制器的输出相关联的功率，并且响应于测量的功率调整施加到BPSK调制器的第一臂或BPSK调制器的第二臂中的至少一个的相位。

    Wafer level coatings for photonic die
    39.
    发明授权
    Wafer level coatings for photonic die 有权

    公开(公告)号：US11217963B1

    公开(公告)日：2022-01-04

    申请号：US16698853

    申请日：2019-11-27

    Applicant: Skorpios Technologies, Inc.

    Inventor： Murtaza Askari ,  Stephen B. Krasulick

    IPC: H01S5/028 ,  G02B6/42 ,  H01S5/02 ,  H01S5/40

    Abstract: A photonic die includes an optical component that can emit output light. The optical component includes a substrate having a length and width that are substantially greater than a thickness thereof, the thickness defining a vertical direction. The optical component includes a vertical edge, and a reflective or antireflective coating on the vertical edge, wherein the reflective or antireflective coating includes a silicon-based material.

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