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公开(公告)号：JPH01138857A
公开(公告)日：1989-05-31
申请号：JP21118288
申请日：1988-08-25
Applicant: SONY CORP
Inventor： KUNIYOSHI YASUNOBU , OKADA TAKAFUMI
IPC: H04N5/44
Abstract: PURPOSE:To facilitate the circuit integration of a video circuit by revising only a data corresponding to an adjusted item among plural adjusting items and transferring the data of all the plural adjusting items serially. CONSTITUTION:A serial data is supplied to a shift register 101 from a deflection circuit 32 in the unit of 65 bits and a blanking pulse Pb is supplied as a clock pulse. The data is converted into an analog voltage by a D/A converter 103 at every adjustment item and the analog control voltage of each adjustment item is extracted. Then the adjustment control voltage of the sound volume and sound quality is fed to electronic control circuit of a preamplifier 23 and the adjustment control voltage of other item is supplied to each electronic control circuit of a video circuit 14. Since the data of each item are transferred serially for the adjustment, it is enough to add one pin for the data in case of circuit integration of the circuit 14 and then the circuit integration is facilitated.
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公开(公告)号：JPS6167383A
公开(公告)日：1986-04-07
申请号：JP19026984
申请日：1984-09-11
Applicant: Sony Corp
Inventor： TSUCHIYA SATOSHI , AOYANAGI MINORU , KUNIYOSHI YASUNOBU
CPC classification number: H04N9/735
Abstract: PURPOSE: To attain accurate white balance by using a sample and hold voltage extracted by three sets of sampling circuits and hold circuits so as to apply 1:1:1 control to a level ratio of the three primary color signals of a main image pickup device.
CONSTITUTION: Charging to three capacitors 24R, 24G, 24B is started by output currents R
1 , G
1 , B
1 of three external photodetector elements 21R, 21G, 21B at each prescribed period, and when the compared output of a voltage comparator circuit 34 is obtained, the charging is stopped. The charging end voltage is extracted while being subject to sampling and holding by three sets of sampling circuits 27R, 27G, 27B and hold circuits 28R, 28G, 28B. Since the ratio of the three primary color signals R, G, B at the output signal of the main image pickup elements 11 is subject to 1:1:1 control by using the extracted sample and hold voltages R
8 , G
8 , B
8 , the white balance adjustment by the automatic tracking system is attained.
COPYRIGHT: (C)1986,JPO&JapioAbstract translation: 目的：通过使用由三组采样电路和保持电路提取的采样和保持电压来获得准确的白平衡，以便对主图像拾取装置的三原色信号的电平比施加1：1：1的控制 。 构成：通过三个外部光电检测元件21R，21G，21B的输出电流R1，G1，B1在规定的周期内对三个电容器24R，24G，24B进行充电，当得到电压比较电路34的输出比较时， 充电停止。 在三组采样电路27R，27G，27B和保持电路28R，28G，28B进行采样和保持的同时提取充电结束电压。 由于通过使用提取的采样和保持电压R8，G8，B8，主图像拾取元件11的输出信号处的三原色信号R，G，B的比率经受1:1:1的控制，所以白色 实现了自动跟踪系统的平衡调整。
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公开(公告)号：JPS5470021A
公开(公告)日：1979-06-05
申请号：JP13679977
申请日：1977-11-15
Applicant: SONY CORP
Inventor： OKADA TAKAFUMI , NIIMURA TSUTOMU , TSUCHIYA TAKAHISA , KUNIYOSHI YASUNOBU
Abstract: PURPOSE:To well control color signal levels constant with a simple circuit constitution by processing the color signals in video signal by using ACC circuit and frequency conversion circuit for both recording and reproducing. CONSTITUTION:At the recording, the color signals having passed through a BPF 13, ACC circuit 13 and switch 32 are supplied to a phase comparator 33 to which the oscillation output of an oscillator 34 is applied. The phase compared outputs therefrom are applied to the oscillator 34, the oscillation outputs having been locked to the phases of the color signals whereof are then applied to a frequency conversion circuit 14. This cuases the burst color signal levels to be controlled to a constant level in a circuit 13 via phase detection circuit 43 and to be applied to heads after having been undergone low frequency level conversion by the frequency conversion circuit 14. At the reproducing, the color signals having passed through the circuits 13, 14, switch 32 are applied to the comparator 33 and at the same time the frequency divided signal of the reproduced horizontal synchronizing signal is applied to a comparator 38. According to both comparison outputs, the phase of the oscillator 39 is clocked, whereby high frequency range conversion is accomplished. Hence, the ACC circuit and frequency conversion circuit are used for both recording and reproducing, whereby the color signal processing circuits are simplified.
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公开(公告)号：JPS5369525A
公开(公告)日：1978-06-21
申请号：JP14586876
申请日：1976-12-03
Applicant: SONY CORP
Inventor： KUNIYOSHI YASUNOBU , SUMI TAKAO
Abstract: PURPOSE:To realize the APC circuit which is hard to cause the mislock by employing the free oscillating frequency of the variable frequency oscillator of the PAC circuit lower than the subcarrier frequency of a low-pass-converted chrominance signal.
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公开(公告)号：JPS5362421A
公开(公告)日：1978-06-03
申请号：JP13807976
申请日：1976-11-16
Applicant: SONY CORP
Inventor： KUNIYOSHI YASUNOBU , OKADA TAKAFUMI , SUMI TAKAO
Abstract: PURPOSE:To surely perform the time axis correction and to increase the stability, by adding the circuit detecting out of synchronism of the control loop constituted with the APC circuit and by compulsively leading in the signal for frequency conversion when the out of synchronism is detected.
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Patent Agency Ranking
公开(公告)号：JPS6262670A
公开(公告)日：1987-03-19
申请号：JP20245085
申请日：1985-09-12
Applicant: SONY CORP
Inventor： KUNIYOSHI YASUNOBU
Abstract: PURPOSE:To obtain a picture effect near to a mosaic fader with an extremely simple constitution by sampling and holding a video signal of a base band by using a pulse signal activated by a horizontal synchronous signal and having a period changed in accordance with a specific fader signal. CONSTITUTION:A signal (a) from a trigger switch 11 instructing a start and a completion of an image pickup is supplied to a fader circuit 12 and a fader signal (c) in which a level is gradually changed according to a tally signal (b) showing a recording condition from a VTR6 is formed. A horizontal synchronous signal HD from a synchronization generating circuit 7 is supplied to a synchronization oscillator OSC14 and a high frequency pulse (e) of duty 50% synchronously with the HD signal and having a period controlled according to the faderd signal is formed. This pulse (e) is supplied to a monostable multivibrator 18 through a switch 15 and a sampling pulse (g) is formed. According to the fader signal (c), the period of the pulse (e) is changed as shown by an arrow, a forming position of the pulse (g) is gradually thinned during a fade in and roughed during a fade out.
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公开(公告)号：JPS61105991A
公开(公告)日：1986-05-24
申请号：JP22819184
申请日：1984-10-30
Applicant: Sony Corp
Inventor： KUNIYOSHI YASUNOBU , TSUCHIYA SATOSHI , AOYANAGI MINORU
IPC: H04N9/73
Abstract: PURPOSE: To avoid a trouble such as the appearance of the influences of up and down change of a count value for 1 bit at the time of automatic follow-up white balance adjusting becoming a change in color by integrating the D/A conversion output of counted value through a time constant circuit and supplying to a gain controlling circuit.
CONSTITUTION: In a vertical blanking section, the light receiving outputs of red, green and blue from external photo-electric elements 1R, 1G, 1B are supplied to gain controlling circuits 9R, 9B in stead of the output of an image pickup element 3. Light receiving output levels of red, green and blue through circuits 9R, 9B are compared with each other, and the comparison outputs are supplied to the up down controlling terminal of up down counters 32R, 32B, and the counted value is controlled to make light receiving output levels of red, green and blue with a specified ratio. The A/D conversion output of the counted values are supplied directly to circuits 9R, 9B in the vertical blanking section. However, the outside of the vertical blanking section, the outputs are supplied to circuits 9R, 9B through time constant circuits 40R, 50B.
COPYRIGHT: (C)1986,JPO&JapioAbstract translation: 目的：为了避免在自动跟踪时白平衡调整成为颜色变化时出现1位计数值的上下变化的影响的问题，将D / A转换输出 通过时间常数电路计数值并提供给增益控制电路。 构成：在垂直消隐部分中，来自外部光电元件1R，1G，1B的红色，绿色和蓝色的光接收输出被提供给增益控制电路9R，9B，而不是图像拾取元件3的输出。 通过电路9R，9B将红色，绿色和蓝色的光接收输出电平进行比较，并将比较输出提供给向上计数器32R，32B的上拉控制端，并且控制计数值使光 以指定的比例接收红色，绿色和蓝色的输出电平。 计数值的A / D转换输出直接提供给垂直消隐部分中的电路9R，9B。 然而，垂直消隐部分的外部，通过时间常数电路40R，50B将输出提供给电路9R，9B。
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公开(公告)号：JPS60180394A
公开(公告)日：1985-09-14
申请号：JP3639484
申请日：1984-02-28
Applicant: SONY CORP
Inventor： NIIMURA TSUTOMU , ESHIYA TADASHI , KUNIYOSHI YASUNOBU
Abstract: PURPOSE:To realize a white balance adjuster of a complete auto tracking type by considering a section where a luminance signal is high and a little of chrominance signal components exist to be white and by adjusting a white balance only when said section can be obtained. CONSTITUTION:A luminance signal Y out of image pickup signal SV obtained in an AGC circuit 3 is supplied to the 1st level detecting circuit 11, and the 1st detecting pulse PY corresponding to a section where a luminance signal superior to the prescribed level V1 exists is formed. Simultaneously a chrominance signal C formed in a processing circuit 6 is supplied to the 2nd level detecting circuit 12 and the 2nd detecting pulse PC corresponding to the section where a chrominance signal below the prescribed level V2 different from the prescribed level V1 exists can be formed. A white balance adjusting circuit 20 is controlled so that only for the section where the 1st and the 2nd detecting pulses PY and PC can be simultaneously obtained, said circuit will operate.
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公开(公告)号：JPS5457829A
公开(公告)日：1979-05-10
申请号：JP12428177
申请日：1977-10-17
Applicant: SONY CORP
Inventor： OKADA TAKAFUMI , KUNIYOSHI YASUNOBU , TOMINAGA KIYONORI
Abstract: PURPOSE:To make a circuit suitable to IC implementation by realizing a digitally- constituted part to be added to a circuit which controls the period of an APC circuit by supplying a voltage to the variable frequency oscillator of the APC circuit. CONSTITUTION:A burst signal, extracted from the chrominance signal of a color video signal, is phase-compared 26 with a reference subcarrier signal and variable frequency oscillator 23 is controlled by the comparison error voltage to generate the frequency converting signal for the chrominance signal. The oscillation signal of this variable frequency oscillator 23 is extracted periodically for a fixed time and counted 44 and it is discriminated by this counting output whether the oscillation frequency of oscillator 23 is within a certain range or not; if it is without the range, the comparison error voltage is supplied to oscillator 23 after being applied with a voltage equivalent to the different direction.
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公开(公告)号：JPS5389317A
公开(公告)日：1978-08-05
申请号：JP376477
申请日：1977-01-17
Applicant: SONY CORP
Inventor： KUNIYOSHI YASUNOBU , SUMI TAKAO
Abstract: PURPOSE:To always make constant the phase of the reproduced carrier signal and to realize the reproduced picture having good quality, by controlling the phase of the signal for frequency conversion through picking up the reproduced burst signal and through the phase detection with the phase synchronous output.
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