公开(公告)号：US11996053B2

公开(公告)日：2024-05-28

申请号：US18049274

申请日：2022-10-24

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jun Hyun Park ,  Dong Woo Kim ,  An Su Lee ,  Kang Moon Jo

IPC: G09G3/3266

CPC classification number: G09G3/3266 ,  G09G2310/08

Abstract: There are provided a gate driver and a display device including the same. The gate driver includes: a first scan driver; a first sensing driver; a first scan clock line; and a first sensing clock line. The first scan clock line includes a first scan clock main line extending in one direction, and a first scan clock connection line connected to the first scan clock main line and the first scan driver. The first sensing clock line includes a first sensing clock main line extending in one direction, and a first sensing clock connection line connected to the first sensing clock main line and the first sensing driver. The first scan clock main line is closer to each of the first scan driver and the first sensing driver than the first sensing clock main line.

公开(公告)号：US11683964B2

公开(公告)日：2023-06-20

申请号：US16988984

申请日：2020-08-10

Applicant: Samsung Display Co., LTD.

Inventor： Kang Moon Jo ,  Chong Chui Chai ,  Jun Hyun Park ,  An Su Lee

IPC: H01L27/14 ,  H01L27/32 ,  G09G3/3208 ,  H01L27/12 ,  H01L51/52

CPC classification number: H01L27/3276 ,  G09G3/3208 ,  H01L27/1255 ,  H01L27/3262 ,  H01L27/3265 ,  H01L51/52 ,  H01L51/5203

Abstract: An organic light emitting diode display includes a substrate, a semiconductor pattern disposed on the substrate, a first conductive layer disposed on the semiconductor pattern and including a first gate electrode having an island-shaped structure, a second gate electrode having an island-shaped structure, and a third gate electrode having an island-shaped structure, and a second conductive layer disposed on the first conductive layer and including a first initialization voltage line overlapping the first gate electrode, a scan line overlapping the second gate electrode, and a control signal line overlapping the third gate electrode, where the control signal line is electrically connected to the third gate electrode, the scan line is electrically connected to the second gate electrode, and the first initialization voltage line, the scan line, and the control signal line extend in a first direction.

公开(公告)号：US11563077B2

公开(公告)日：2023-01-24

申请号：US17160284

申请日：2021-01-27

Applicant: Samsung Display Co., Ltd.

Inventor： Kang Moon Jo ,  Sung Jae Moon ,  An Su Lee ,  Tak-Young Lee

IPC: H01L27/32 ,  H01L27/12

Abstract: A display device includes: a substrate; first, second, and third data lines extending in a first direction on the substrate and disposed to be adjacent along a second direction crossing the first direction; a semiconductor layer disposed on the first, second, and third data lines; a first insulating layer disposed on the semiconductor layer; first, second, and third lower storage electrodes disposed on the first insulating layer and arranged to be adjacent along the first direction; a second insulating layer disposed on the first, second, and third lower storage electrodes; a first scan line extending in the second direction on the second insulating layer; a first pixel connected to the first scan line and the first data line; a second pixel connected to the first scan line and the second data line; and a third pixel connected to the first scan line and the third data line.

公开(公告)号：US11348530B2

公开(公告)日：2022-05-31

申请号：US16707994

申请日：2019-12-09

Applicant: Samsung Display Co., Ltd.

Inventor： Yang Hwa Choi ,  Jun Hyun Park ,  Dong Woo Kim ,  Kang Moon Jo ,  Sung Jae Moon ,  An Su Lee ,  Woong Sik Choi

IPC: G09G3/3266 ,  G09G3/3258 ,  G09G3/3275

Abstract: A stage of a scan driver includes: a first driving controller for controlling a voltage of a first node and a voltage of a second node; a second driving controller for controlling a voltage of a first driving node, based on a sensing-on signal, a next carry signal, a first control clock signal, a second control clock signal, the voltage of the first node, and a voltage of a sampling node, and controlling a voltage of a second driving node, based on the voltage of the sampling node and the voltage of the first driving node; an output buffer for outputting a carry signal, the first scan signal, and the second scan signal; and a coupling controller. The second driving controller maintains the voltage of the first driving node as a gate-off voltage in response to the voltage of the second driving node and a third control clock signal.

公开(公告)号：US11322093B2

公开(公告)日：2022-05-03

申请号：US17062971

申请日：2020-10-05

Applicant: Samsung Display Co., Ltd.

Inventor： Jun Hyun Park ,  Chong Chui Chai ,  Young Wan Seo ,  An Su Lee ,  Bo Yong Chung ,  Kang Moon Jo

IPC: G09G3/3258 ,  G09G3/3233

Abstract: A pixel circuit includes a first switching element including a control electrode connected to a first node, an input electrode which receives a first power voltage and an output electrode connected to a third node, a second switching element including a control electrode which receives a compensation gate signal, an input electrode connected to a second node and an output electrode connected to the third node, a third switching element including a control electrode which receives a write gate signal, an input electrode connected to the first node and an output electrode connected to the second node, a storage capacitor including a first electrode which receives an initialization voltage and a second electrode connected to the first node, a program capacitor which receives a data voltage and connected to the second node, and an organic light emitting element connected to the third node and which receives a second power voltage.

公开(公告)号：US11227843B2

公开(公告)日：2022-01-18

申请号：US16821691

申请日：2020-03-17

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jun Hyun Park ,  An Su Lee ,  Dong Woo Kim ,  Sung Jae Moon ,  Kang Moon Jo

IPC: H01L51/52 ,  H01L23/60 ,  H01L27/32 ,  H01L51/56

Abstract: A display device includes a substrate that includes a display area and a non-display area. A driver is disposed in the non-display area, and includes a driver circuit including a transistor and a driver control line transmitting a control signal to the driver circuit. A static electricity blocking line is disposed in the non-display area and circumscribes the display area. The static electricity blocking line at least partially overlaps the driver.

公开(公告)号：US11199573B2

公开(公告)日：2021-12-14

申请号：US16851590

申请日：2020-04-17

Applicant: Samsung Display Co., Ltd.

Inventor： Jun Hyun Park ,  Dong Woo Kim ,  An Su Lee ,  Kang Moon Jo

IPC: G01R31/28 ,  G01R31/56 ,  G09G3/00 ,  G09G3/3266

Abstract: A display panel includes: a pixel region comprising a plurality of pixels; an open/short test region comprising a plurality of open/short test pads; a dummy stage configured to generate a carry signal in response to a scan start signal; and a plurality of stages configured to sequentially provide a plurality of scan signals to the plurality of pixels in response to the carry signal, wherein the plurality of stages is spaced apart by a first distance from the pixel region, and the dummy stage is spaced apart by a second distance greater than the first distance from the open/short test region.

公开(公告)号：US11081056B2

公开(公告)日：2021-08-03

申请号：US15989673

申请日：2018-05-25

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jun Hyun Park ,  Young Wan Seo ,  An Su Lee ,  Kang Moon Jo ,  Chong Chul Chai

IPC: G09G3/3266 ,  G09G3/3225 ,  G09G3/3233

Abstract: An organic light emitting display device includes a plurality of pixels. A pixel on an ith horizontal line includes a first transistor coupled between a first power source and a first node and having a gate electrode coupled to a second node. An organic light emitting diode is coupled between the first node and a second power source. A second transistor is coupled between the second and third nodes and is turned on when a first scan signal is supplied to an ith first scan line. A third transistor is coupled between the third and first nodes. A first capacitor is coupled between an ith control line and the second node. A second capacitor is coupled between the third node and a data line. The pixels are simultaneously driven during first, second, and third periods of a frame period and sequentially driven during a fourth period of the frame period.

公开(公告)号：US20200185489A1

公开(公告)日：2020-06-11

申请号：US16596952

申请日：2019-10-09

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： KANG MOON JO ,  Dong Woo Kim ,  Sung Jae Moon ,  Jun Hyun Park ,  An Su Lee

IPC: H01L27/32 ,  H01L51/52

Abstract: A display device including: a substrate; an active layer disposed on the substrate and including active patterns; a first conductive layer disposed on the active layer; a second conductive layer disposed on the first conductive layer and including a data line; a third conductive layer disposed on the second conductive layer; and a light-emitting element disposed on the third conductive layer, wherein the first conductive layer includes a scan line, a first voltage line, and a second voltage line, the third conductive layer includes a third voltage line connected to the first voltage line and a fourth voltage line connected to the second voltage line, the first voltage line and the second voltage line extend in a first direction, the third voltage line and the fourth voltage line extend in a second direction, and the third voltage line and the fourth voltage line are alternately arranged in the first direction.

公开(公告)号：US20200185481A1

公开(公告)日：2020-06-11

申请号：US16698121

申请日：2019-11-27

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： JUN HYUN PARK ,  Kang Moon Jo ,  Dong Woo Kim ,  Sung Jae Moon ,  An Su Lee ,  Woong-Sik Choi

IPC: H01L27/32

Abstract: According to an exemplary embodiment, an organic light emitting diode display includes: a substrate; a semiconductor layer; a first gate insulating layer disposed on the oxide semiconductor layer; a first gate layer disposed on the first gate insulating layer; a first interlayer insulating layer disposed on the first gate layer; a first data layer disposed on the first interlayer insulating layer; a second interlayer insulating layer disposed on the first data layer; a driving voltage line and a driving low voltage line disposed on the second interlayer insulating layer and separated from each other; an upper insulating layer covering the driving voltage line and the driving low voltage line; and an anode disposed on the upper insulating layer and overlapping the driving voltage line or the driving low voltage line.