公开(公告)号：US12172374B2

公开(公告)日：2024-12-24

申请号：US18527663

申请日：2023-12-04

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Daniel Lee Revier ,  Sean Ping Chang ,  Benjamin Stassen Cook

IPC: B29C64/165 ,  B22F10/00 ,  B22F10/14 ,  B22F12/37 ,  B22F12/53 ,  B22F12/55 ,  B22F12/57 ,  B28B1/00 ,  B33Y10/00 ,  B33Y30/00 ,  B33Y70/00 ,  B33Y80/00 ,  H01L21/02 ,  H01L21/288 ,  H01L21/67 ,  B22F12/00 ,  B22F12/41 ,  B22F12/49 ,  B29C64/241 ,  B29L31/34 ,  C04B35/14

Abstract: A layer of additive material is formed in a circular printing area on a substrate using additive sources distributed across a printing zone. The additive sources form predetermined discrete amounts of the additive material. The substrate and the additive sources are rotated with respect to each other around a center of rotation, so that a pattern of the additive material is formed in a circular printing area on the substrate. Each additive source receives actuation waveforms at an actuation frequency that is proportional to a distance of the additive source from the center of rotation. The actuation waveforms include formation signals, with a maximum of one formation signal in each cycle of the actuation frequency. The formation signals result in the additive sources forming the predetermined discrete amounts of the additive material on the substrate.

公开(公告)号：US20220336217A1

公开(公告)日：2022-10-20

申请号：US17847250

申请日：2022-06-23

Applicant: Texas Instruments Incorporated

Inventor： Benjamin Stassen Cook ,  Daniel Lee Revier

IPC: H01L21/02 ,  H01L21/66 ,  H01L21/8238 ,  H01L21/3205 ,  B33Y30/00 ,  H01L27/092 ,  H01L21/8234 ,  H01L21/762

Abstract: A microelectronic device is formed by forming at least a portion of a substrate of the microelectronic device by one or more additive processes. The additive processes may be used to form semiconductor material of the substrate. The additive processes may also be used to form dielectric material structures or electrically conductive structures, such as metal structures, of the substrate. The additive processes are used to form structures of the substrate which would be costly or impractical to form using planar processes. In one aspect, the substrate may include multiple doped semiconductor elements, such as wells or buried layers, having different average doping densities, or depths below a component surface of the substrate. In another aspect, the substrate may include dielectric isolation structures with semiconductor material extending at least partway over and under the dielectric isolation structures. Other structures of the substrate are disclosed.

公开(公告)号：US20220208640A1

公开(公告)日：2022-06-30

申请号：US17138541

申请日：2020-12-30

Applicant: Texas Instruments Incorporated

Inventor： Benjamin Stassen Cook ,  Nazila Dadvand ,  Archana Venugopal ,  Daniel Lee Revier

IPC: H01L23/373 ,  H01L23/532 ,  H01L21/78 ,  H01L21/3205 ,  H01L21/683

Abstract: In described examples, a semiconductor wafer with a thermally conductive surface layer comprises a bulk semiconductor layer having a first surface and a second surface, circuitry on the first surface, a metallic layer attached to the first surface or the second surface, and a graphene layer attached to the metallic layer. The first surface opposes the second surface. The metallic layer comprises a transition metal.

公开(公告)号：US20210151551A1

公开(公告)日：2021-05-20

申请号：US17163766

申请日：2021-02-01

Applicant: Texas Instruments Incorporated

Inventor： Benjamin Stassen Cook ,  Daniel Lee Revier

IPC: H01L49/02 ,  H01L21/56 ,  H01L23/31 ,  H01L23/66

Abstract: In described examples, a method for fabricating a semiconductor device and a three dimensional structure, and packaging them together, includes: fabricating the integrated circuit on a substrate, immersing the substrate in a liquid encapsulation material, and illuminating the liquid encapsulation material to polymerize the liquid encapsulation material. Immersing the semiconductor device is performed to cover a layer of a platform in the liquid encapsulation material. The platform is a lead frame, a packaging substrate, or the substrate. The illuminating step targets locations of the liquid encapsulation material covering the layer. Illuminated encapsulation material forms solid encapsulation material that is fixedly coupled to contiguous portions of the semiconductor device and of the solid encapsulation material. The immersing and illuminating steps are repeated until a three dimensional structure is formed. The integrated circuit and the three dimensional structure are encapsulated in a single package.

公开(公告)号：US20210151357A1

公开(公告)日：2021-05-20

申请号：US17140886

申请日：2021-01-04

Applicant: Texas Instruments Incorporated

Inventor： Benjamin Stassen Cook ,  Daniel Lee Revier

IPC: H01L23/29 ,  H03H9/02 ,  H01L23/31 ,  H01L23/495 ,  H01L23/00 ,  H01L23/34 ,  G10K11/162

Abstract: An encapsulated integrated circuit includes an integrated circuit (IC) die. An encapsulation material encapsulates the IC die. Within the encapsulation material, a phononic bandgap structure is configured to have a phononic bandgap with a frequency range approximately equal to a range of frequencies of thermal phonons produced by the IC die when the IC die is operating.

公开(公告)号：US10861715B2

公开(公告)日：2020-12-08

申请号：US16236099

申请日：2018-12-28

Applicant: Texas Instruments Incorporated

Inventor： Benjamin Stassen Cook ,  Daniel Lee Revier

IPC: H01L21/56 ,  H01L23/31 ,  H01L23/66 ,  H01L23/495 ,  H01L23/00

Abstract: In described examples, a method for encapsulating a semiconductor device includes the steps of immersing a layer of the semiconductor device in a liquid encapsulation material, irradiating portions of the liquid encapsulation material to polymerize the liquid encapsulation material, and moving the semiconductor device further from a surface of the liquid encapsulation material proximate to the layer. Immersing the semiconductor device is performed to cover a layer of the device in the liquid encapsulation material. Targeted locations of the liquid encapsulation material covering the layer are irradiated to form solid encapsulation material. The semiconductor device is moved from a surface of the liquid encapsulation material so that a new layer of the semiconductor device and/or of the solid encapsulation material can be covered by the liquid encapsulation material. The irradiating and moving steps are then repeated until a three dimensional structure on the semiconductor device is formed using the solid encapsulation material.

公开(公告)号：US10553573B2

公开(公告)日：2020-02-04

申请号：US15693985

申请日：2017-09-01

Applicant: Texas Instruments Incorporated

Inventor： Daniel Lee Revier ,  Steven Alfred Kummerl ,  Benjamin Stassen Cook

IPC: H01L23/31 ,  H01L23/367 ,  H01L23/495 ,  H01F7/02 ,  H01F7/20 ,  H01L25/00 ,  H01L21/687

Abstract: Integrated circuits may be assembled by placing a batch of integrated circuit (IC) die on a leadframe. Each of the IC die includes a magnetically responsive structure that may be an inherent part of the IC die or may be explicitly added. The IC die are then agitated to cause the IC die to move around on the leadframe. The IC die are captured in specific locations on the leadframe by an array of magnetic domains that produce a magnetic response from the plurality of IC die. The magnetic domains may be formed on the lead frame, or may be provided by a magnetic chuck positioned adjacent the leadframe.

公开(公告)号：US10444432B2

公开(公告)日：2019-10-15

申请号：US15799740

申请日：2017-10-31

Applicant: Texas Instruments Incorporated

Inventor： Benjamin Stassen Cook ,  Daniel Lee Revier

IPC: G02B6/122 ,  H01P3/10 ,  H01L23/31 ,  H01L23/495 ,  H01L23/00 ,  H01L21/56 ,  G02B6/12 ,  H01P1/20 ,  H01P3/16 ,  H01P3/123

Abstract: An encapsulated package is provided that includes a pair integrated circuit (IC) die. A radio frequency (RF) circuit on one of the IC die is operable to transmit an RF signal having a selected frequency. An RF circuit on the other IC die is operable to receive the RF signal Encapsulation material encapsulates the IC die. A photonic waveguide couples between the RF transmitter and RF receiver to form galvanic path isolation between the two IC die. The photonic waveguide is formed by a photonic structure within the encapsulation material.

公开(公告)号：US20190204505A1

公开(公告)日：2019-07-04

申请号：US15859494

申请日：2017-12-30

Applicant: Texas Instruments Incorporated

Inventor： Benjamin Stassen Cook ,  Daniel Lee Revier

IPC: G02B6/12 ,  H01L31/12 ,  H01L31/0203 ,  H01L31/02 ,  G02B6/138 ,  H05K1/02 ,  H01P3/16

CPC classification number: G02B6/12004 ,  G02B6/138 ,  G02B2006/12147 ,  H01L31/02005 ,  H01L31/0203 ,  H01L31/12 ,  H01P3/16 ,  H05K1/024

Abstract: A microelectronic device includes a photonic die having a die input/output (I/O) port. The microelectronic device includes a photonic connection between the first photonic I/O port and the second photonic I/O port. The photonic connection has a dielectric signal pathway for a photonic signal from the first photonic I/O port to the second photonic I/O port. The second photonic I/O port may be a package photonic I/O port at an exterior of the microelectronic device, or may be another die photonic I/O port on another photonic die of the microelectronic device. The photonic connection is formed using at least one additive process, such as by selectively placing material for the photonic connection in a region for the photonic connection.

公开(公告)号：US20190131682A1

公开(公告)日：2019-05-02

申请号：US15799740

申请日：2017-10-31

Applicant: Texas Instruments Incorporated

Inventor： Benjamin Stassen Cook ,  Daniel Lee Revier

IPC: H01P3/10 ,  H01L23/31 ,  H01L23/495 ,  H01L23/00 ,  H01L21/56 ,  G02B6/122 ,  G02B6/12

CPC classification number: G02B6/1225 ,  G02B6/10 ,  G02B6/12004 ,  G02B2006/12123 ,  H01L21/56 ,  H01L23/3121 ,  H01L23/49513 ,  H01L23/49537 ,  H01L23/49541 ,  H01L23/49548 ,  H01L23/49575 ,  H01L23/66 ,  H01L24/48 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48245 ,  H01L2224/48247 ,  H01L2224/4903 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01P1/2005 ,  H01P3/10 ,  H01P3/123 ,  H01P3/16 ,  H01L2224/45099 ,  H01L2924/00

Abstract: An encapsulated package is provided that includes a pair integrated circuit (IC) die. A radio frequency (RF) circuit on one of the IC die is operable to transmit an RF signal having a selected frequency. An RF circuit on the other IC die is operable to receive the RF signal Encapsulation material encapsulates the IC die. A photonic waveguide couples between the RF transmitter and RF receiver to form galvanic path isolation between the two IC die. The photonic waveguide is formed by a photonic structure within the encapsulation material.