公开(公告)号：US12088293B2

公开(公告)日：2024-09-10

申请号：US17700045

申请日：2022-03-21

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Win Naing Maung ,  Bharath Kumar Singareddy ,  Soumi Paul ,  Mayank Garg ,  Suzanne Mary Vining

IPC: H03K19/0185 ,  G06F13/42 ,  H04B3/36 ,  H04L7/00 ,  H04L25/02

CPC classification number: H03K19/018521 ,  G06F13/4282 ,  H04B3/36 ,  H04L7/0041 ,  H04L25/0272

Abstract: A circuit includes signal conditioner circuitry, level shifter circuitry, and state detector and controller circuitry coupled between the signal conditioner circuitry and the level shifter circuitry. The state detector and controller circuitry includes receiver circuitry and a finite state machine coupled to the receiver circuitry. The finite state machine is configured to detect a first data rate from signals, control operation of the signal conditioner circuitry responsive to detecting the first data rate, and control operation of the level shifter circuitry during a second data rate.

公开(公告)号：US11543875B2

公开(公告)日：2023-01-03

申请号：US17577688

申请日：2022-01-18

Applicant: Texas Instruments Incorporated

Inventor： Suzanne Mary Vining ,  Douglas Edward Wente ,  Win Naing Maung ,  Julie Marie Nirchi

IPC: G06F1/3234 ,  G06F13/42 ,  G06F1/3206 ,  G06F13/40

Abstract: In an example, a data communication device includes one or more receivers, and one or more transmitters. The data communication device detects a start of frame packet (μSOF) on a data bus, wherein the μSOF indicates the start of a microframe; determines whether there are any data packets contained in the microframe during a first threshold period after the μSOF; and detects that there is no data packet contained in the microframe during the first threshold period after the μSOF, and in response, transitions at least one of the one or more transmitters from an active state to an OFF state, and transitions the at least one of the one or more transmitters from the OFF state to the active state prior to a switchback period before the end of the microframe.

公开(公告)号：US11309892B2

公开(公告)日：2022-04-19

申请号：US17174119

申请日：2021-02-11

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Win Naing Maung ,  Bharath Kumar Singareddy ,  Soumi Paul ,  Mayank Garg ,  Suzanne Mary Vining

IPC: H04B3/36 ,  G06F13/42 ,  H04L25/02 ,  H03K19/0185 ,  H04L7/00

Abstract: A circuit includes signal conditioner circuitry, level shifter circuitry, and state detector and controller circuitry coupled between the signal conditioner circuitry and the level shifter circuitry. The state detector and controller circuitry includes receiver circuitry and a finite state machine coupled to the receiver circuitry. The finite state machine is configured to detect a first data rate from signals, control operation of the signal conditioner circuitry responsive to detecting the first data rate, and control operation of the level shifter circuitry during a second data rate.

公开(公告)号：US11068428B2

公开(公告)日：2021-07-20

申请号：US16414496

申请日：2019-05-16

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Win Naing Maung ,  Yonghui Tang ,  Huanzhang Huang ,  Douglas Edward Wente

IPC: G06F13/00 ,  G06F13/40 ,  G06F13/42

Abstract: Aspects of the present disclosure provide for a system. In at least some examples, the system includes an embedded Universal Serial Bus 2 (eUSB2) device having a first receiver and a first transmitter, a processor, a second transmitter coupled to the processor, a second receiver coupled to the processor, a drive low circuit coupled to the processor second transmitter, and differential signal lines having a length greater than ten inches. The differential signal lines are coupled at a first end to the first receiver and the first transmitter and at a second end to the second transmitter and the second receiver. The processor is configured to control the drive low circuit to drive the differential signal lines low with a logic ‘0’ to cause the first receiver to receive the logic ‘0’ and a value of a signal present on the differential signal lines to reach about 0 volts.

公开(公告)号：US10891242B2

公开(公告)日：2021-01-12

申请号：US16661018

申请日：2019-10-23

Applicant: Texas Instruments Incorporated

Inventor： Douglas Edward Wente ,  Suzanne Mary Vining ,  Win Naing Maung ,  Julie Marie Nirchi

IPC: G06F13/42 ,  G06F13/10

Abstract: A method of operating an embedded USB2 (eUSB2) repeater includes receiving a downstream packet at a USB2 port and transitioning a USB transmitter from an idle state to a standby state responsive to receiving the downstream packet. The method further includes transitioning the USB transmitter from the standby state to an active state if an upstream packet is received at an eUSB2 port within a first time period of receiving the downstream packet and transmitting the upstream packet. The method also includes transitioning the USB transmitter from the active state to the standby state after transmission of the upstream packet. The method also includes transitioning the USB transmitter from the standby state to the idle state if more upstream packets are not received at the eUSB2 port within a second time period.

公开(公告)号：US10657089B2

公开(公告)日：2020-05-19

申请号：US16404433

申请日：2019-05-06

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Win Naing Maung ,  Bhupendra Sharma ,  Huanzhang Huang ,  Douglas Edward Wente ,  Suzanne Mary Vining ,  Mustafa Ulvi Erdogan

IPC: H03K5/24 ,  G06F13/38 ,  H03F3/45 ,  G06F13/42

Abstract: Aspects of the disclosure provide for a method. In at least some examples, the method includes receiving, at a circuit, data via a differential input signal. The method further includes detecting a falling edge in the data received via the differential input signal. The method further includes holding an output of the circuit at a final logical value of the data. The method further includes disabling a transmitter of the circuit while holding the output of the circuit at the final logical value of the data. The method further includes releasing the output of the circuit from the final logical value of the data.

公开(公告)号：US09965424B2

公开(公告)日：2018-05-08

申请号：US14614540

申请日：2015-02-05

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Win Naing Maung ,  Suzanne Mary Vining

IPC: G06F13/40 ,  G06F13/38 ,  G06F13/42

CPC classification number: G06F13/4022 ,  G06F13/385 ,  G06F13/387 ,  G06F13/4027 ,  G06F13/4221 ,  G06F2213/0042

Abstract: A Universal Serial Bus (USB) adapter includes a USB hub and a USB switch. The USB hub includes a plurality of downstream ports and one upstream port. The USB switch includes a plurality of connections that comprise a first connection configured to be coupled to a first USB apparatus, a second connection configured to be coupled to a second USB apparatus, a third connection coupled to the USB hub's upstream port, and a fourth connection coupled to one of the USB hub's downstream ports. The USB switch is configured to establish a first communication path between the first and second connections that bypasses the USB hub based on a determination that the first USB apparatus is to operate as a USB host, and to establish a second communication path through the USB hub based on a determination that the first USB apparatus is to operate as a client device.

公开(公告)号：US20170315946A1

公开(公告)日：2017-11-02

申请号：US15651432

申请日：2017-07-17

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Win Naing Maung ,  Yonghui Tang ,  Suzanne Mary Vining ,  Hao Liu

IPC: G06F13/38

CPC classification number: G06F13/385

Abstract: A signal conditioner can include a state machine configured to detect a predetermined protocol level mode of a data signal on a bi-directional serial bus. The signal conditioner can also include a re-driver configured to inject current into at least one of a rising edge and a falling edge of the data signal on the bi-directional serial bus in response to the detection of the predetermined protocol level mode.