公开(公告)号：EP0583802A1

公开(公告)日：1994-02-23

申请号：EP93117188.8

申请日：1990-08-24

Applicant: ANRITSU CORPORATION

Inventor： Saeki, Hiroshi ,  Motoyama, Hatsuo

IPC: H03B19/20 ,  H03B21/01

CPC classification number: H03B19/16 ,  H03B5/1203 ,  H03B5/1231 ,  H03B5/1243 ,  H03B5/1262 ,  H03B5/1293 ,  H03B19/20 ,  H03B21/01 ,  H03B2200/0034 ,  H03B2200/0042 ,  H03B2201/0208 ,  H03B2201/0216 ,  H03B2201/033 ,  H03L7/093 ,  H03L7/113

Abstract: A signal generator is provided having harmonic generating means for generating harmonic signals responsive to an input signal. An input branch point (P1) is connected to the output end of the harmonic generating means (401), where a plurality of diodes are collectively connected to the input branch point (P1). This arrangement is followed by a plurality of further branch points (P2, P4, P6) and associated diodes. A plurality of band pass filters are connected to the output of the second diodes, each band pass filter having a frequency characteristic for permitting desired harmonic frequency signals to pass therethrough. A plurality of bias means ((404) (Y1) - (Y9)) are provided in the conducting path of each of the plurality of band pass filters ((402) (1) - (9)). Switching means (418) are coupled to the plurality of bias means for applying a DC bias voltage to bring the diodes in a conducting or non-conducting state.

公开(公告)号：EP0414260A2

公开(公告)日：1991-02-27

申请号：EP90116261.0

申请日：1990-08-24

Applicant: ANRITSU CORPORATION

Inventor： Saeki Anritsu Okihara-Ryou, Hiroshi ,  Motoyama, Hatsuo

IPC: H03B21/01 ,  H03L7/087 ,  H03L7/099 ,  H03B19/16

CPC classification number: H03B19/16 ,  H03B5/1203 ,  H03B5/1231 ,  H03B5/1243 ,  H03B5/1262 ,  H03B5/1293 ,  H03B19/20 ,  H03B21/01 ,  H03B2200/0034 ,  H03B2200/0042 ,  H03B2201/0208 ,  H03B2201/0216 ,  H03B2201/033 ,  H03L7/093 ,  H03L7/113

Abstract: To output desired high purity signals, a frequency synthesizer was made to synthesize reference signals from a first and second signal generators (11, 12) in the same frequency band as a desired frequency band. Thereby, the resolution of the frequency synthesizer becomes twice the step ΔF. Also, the frequency synthe­sizer can interpolate the step size of the first signal generator with half the number of steps. While, heretofore, the 100-MHz step size was interpolated with Fq = 0, 10, 20, 30, 40 and 50 MHz, Fq = 0, 20, 40 MHz interpolation is made possible. This permits the syn­thesis of 580 MHz to 1280 MHz. In this case, however, the minimum difference between the sum and difference frequencies from the first and second signal generators (11, 12) is 40 MHz and the lowest frequency is 20 MHz. Thus, depending on mixer isolation, the spurious meas­ures become difficult. The frequency synthesizer of the present invention pays attention to the fact that 20 MHz step signals can be synthesized at frequencies which are integral multiples of Fq (multiples of 0 and 5 are excluded). When two-fold Fq is used, the minimum dif­ference between the sum and difference frequencies out­put from a mixer (13) is 80 MHz and the lowest used frequency is 40 MHz. The spurious measures by a PLL circuit (14) becomes easy. A frequency detector (18) forces the free-running frequency of a VCO included the PLL circuit. Control Data P and Q to the first and sec­ond signal generators are supplied from a control sec­tion (27) based on data Fi set by as frequency setting section (28).

Abstract translation: 为了输出所需的高纯度的信号，这使得从在相同的频带作为一种期望的频率带的第一和第二信号发生器（11，12）合成的参考信号的频率合成器。 由此，频率合成器的分辨率变为两倍的步骤DELTA F.因此，频率合成器可以与步骤一半数量的内插所述第一信号发生器的步长大小。 而，迄今为止，在100-MHz的步长大小，其与Fq中= 0，10，20，30，40和50兆赫，F Q = 0，20，40 MHz的内插是可能的内插。 这允许580兆赫的合成，1280兆赫。 在这种情况下，然而，和与差之间的最小差值从所述第一和第二信号发生器频率（11，12）为40MHz，而最低频率为20MHz。 因此，根据混频器的隔离，寄生措施变得困难。 本发明的频率合成器注重可以在哪些是Fq上的整数倍的频率进行合成的factthat 20MHz的步骤信号（0和5的倍数除外）。 当使用两倍FQ，和与差之间的最小差值频率从混频器输出（13）是80MHz，最低使用频率为40兆赫。 由PLL电路（14）的寄生措施变得容易。 频率检测器（18）强制VCO的自由运行频率包括在PLL电路。 控制数据P和Q，以将第一和第二信号发生器，从一个控制部分（27），基于由设定为频率设定部（28）的数据网络连接提供。