公开(公告)号：US20170195213A1

公开(公告)日：2017-07-06

申请号：US14984620

申请日：2015-12-30

Applicant: STMICROELECTRONICS, INC.

Inventor： Jonathan EVANS ,  Lee JOHNSON ,  Amit Kumar AGGARWAL

IPC: H04L12/707 ,  H04L12/801 ,  H04L12/46

CPC classification number: H04L45/24 ,  H04L12/4641 ,  H04L47/17

Abstract: A method and apparatus for multipath switching using per-hop virtual local area network (VLAN) remapping is disclosed. In the method and apparatus, a data packet is forwarded for transmission over one of a first port and a second port. The device identifies a VLAN ID of the data packet as a second VLAN ID and changes the second VLAN ID to a first VLAN ID. Then one or more criteria of a classification set entry for forwarding the data packet over the second port are evaluated. The data packet is forwarded over the second port if the criteria are met and the data packet is associated with the second VLAN ID. Alternatively, the data packet is forwarded over the first port and is associated with the first VLAN ID if a dynamic entry specifies the data packet is to be forwarded over the first port.

公开(公告)号：US20170194481A1

公开(公告)日：2017-07-06

申请号：US15467100

申请日：2017-03-23

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ,  STMicroelectronics, Inc.

Inventor： Hong He ,  Nicolas Loubet ,  Junli Wang

IPC: H01L29/78 ,  H01L29/161 ,  H01L29/49 ,  H01L29/66

CPC classification number: H01L29/785 ,  H01L21/02236 ,  H01L21/02532 ,  H01L21/02592 ,  H01L21/2256 ,  H01L21/31116 ,  H01L29/1054 ,  H01L29/161 ,  H01L29/167 ,  H01L29/4966 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/66795 ,  H01L29/66818

Abstract: A method for channel formation in a fin transistor includes removing a dummy gate and dielectric from a dummy gate structure to expose a region of an underlying fin and depositing an amorphous layer including Ge over the region of the underlying fin. The amorphous layer is oxidized to condense out Ge and diffuse the Ge into the region of the underlying fin to form a channel region with Ge in the fin.

公开(公告)号：US20170187420A1

公开(公告)日：2017-06-29

申请号：US14980641

申请日：2015-12-28

Applicant: STMicroelectronics, Inc.

Inventor： James D. Allen ,  Oleg Logvinov

IPC: H04B3/54 ,  H04L12/24 ,  H04L29/08

CPC classification number: H04B3/54 ,  H04L41/12 ,  H04L67/12

Abstract: A powerline communication system includes a plurality of rail segments. Each of the rail segments is electrically isolated from other rail segments, and each receives power from a rail segment power supply. At least one cart operates on the rail segments. The cart has a powerline communications controller. Each rail segment has a current state defined by how many and which carts are operating on the rail segment. A central coordinator is coupled to each rail segment and configured to execute a channel estimation using a sounding protocol on its rail segment. The central coordinators store tone maps associated with the possible states of its rail segment, and possibly its adjacent rail segment. A main controller communicates with each central coordinator to direct the state and future state of its segment so that tone maps and network keys can be managed by the CCo in advance of an imminent state change. The main controller or CCo may also execute channel estimation using a sounding protocol and cause updated tone map information to be sent to each central coordinator in advance of an imminent state change.

公开(公告)号：US20170184681A1

公开(公告)日：2017-06-29

申请号：US15455321

申请日：2017-03-10

Applicant: STMicroelectronics, Inc. ,  STMicroelectronics International N.V.

Inventor： K. R. Hariharasudhan ,  Frank J. Sigmund

IPC: G01R31/36

Abstract: An electronic device includes a processor coupled to a battery and to determine whether the battery is being charged or discharged. If the battery being is being discharged, the processor operates to calculate an amount by which the battery has discharged since a preceding calculation of remaining capacity of the battery, compensate the amount by which the battery has discharged for a condition of the battery, and calculate a remaining capacity of the battery as a function of the amount by which the battery has discharged. If the battery is being charged, the processor operates to calculate an amount by which the battery has charged since a preceding calculation of remaining capacity of the battery, compensate the amount by which the battery has charged for a condition of the battery, and calculate the remaining capacity of the battery as a function of the amount by which the battery has charged.

公开(公告)号：US20170176763A1

公开(公告)日：2017-06-22

申请号：US14976924

申请日：2015-12-21

Applicant: STMicroelectronics, Inc.

Inventor： Mark A. Lysinger ,  Chih-Hung Tai ,  James L. Worley ,  Pavan Nallamothu

IPC: G02B27/64 ,  H02K41/035 ,  H04N5/232 ,  G03B5/00 ,  H04N5/225

CPC classification number: G02B27/646 ,  G03B5/00 ,  G03B2205/0007 ,  G03B2205/0069 ,  H02K41/0354 ,  H02P7/025 ,  H04N5/2252 ,  H04N5/2254 ,  H04N5/23251 ,  H04N5/23258 ,  H04N5/23287

Abstract: Various embodiments provide an optical image stabilization circuit including a drive circuit having a power waveform generator and a power waveform conversion circuit. The power waveform generator generates a power waveform. The power waveform conversion circuit converts the power waveform to a power drive signal. An actuator is then driven by the power drive signal to move a lens accordingly and compensate for any movements and vibrations of a housing of the lens.

公开(公告)号：US20170162711A1

公开(公告)日：2017-06-08

申请号：US15259516

申请日：2016-09-08

Applicant: International Business Machines Corporation ,  STMicroelectronics, Inc.

Inventor： Lawrence A. Clevenger ,  Carl J. Radens ,  Yiheng Xu ,  John H. Zhang

IPC: H01L29/786 ,  H01L29/49 ,  H01L29/66

CPC classification number: H01L29/78693 ,  H01L21/823437 ,  H01L27/14614 ,  H01L29/247 ,  H01L29/4908 ,  H01L29/66969 ,  H01L29/78603 ,  H01L29/78618 ,  H01L29/78696

Abstract: Processes and overturned thin film device structures generally include a metal gate having a concave shape defined by three faces. The processes generally include forming the overturned thin film device structures such that the channel self-aligns to the metal gate and the contacts can be self-aligned to the sacrificial material.

公开(公告)号：US09673103B2

公开(公告)日：2017-06-06

申请号：US14754812

申请日：2015-06-30

Applicant: STMicroelectronics, Inc.

Inventor： John C. Pritiskutch ,  Richard Hildenbrandt

IPC: H01L29/78 ,  H01L21/8234 ,  H01L27/088

CPC classification number: H01L21/823493 ,  H01L21/2253 ,  H01L21/26513 ,  H01L21/266 ,  H01L21/324 ,  H01L21/823412 ,  H01L21/823487 ,  H01L27/088 ,  H01L29/1083 ,  H01L29/7827

Abstract: First and second transistors with different electrical characteristics are supported by a substrate having a first-type dopant. The first transistor includes a well region within the substrate having the first-type dopant, a first body region within the well region having a second-type dopant and a first source region within the first body region and laterally offset from the well region by a first channel. The second transistor includes a second body region within the semiconductor substrate layer having the second-type dopant and a second source region within the second body region and laterally offset from material of the substrate by a second channel having a length greater than the length of the first channel. A gate region extends over portions of the first and second body regions for the first and second channels, respectively.

公开(公告)号：US09660081B2

公开(公告)日：2017-05-23

申请号：US15084312

申请日：2016-03-29

Applicant: STMicroelectronics, Inc.

Inventor： Pierre Morin ,  Nicolas Loubet

IPC: H01L29/78 ,  H01L29/66 ,  H01L21/225 ,  H01L29/165 ,  H01L29/06 ,  H01L29/16 ,  H01L29/161 ,  H01L29/786 ,  H01L29/10

CPC classification number: H01L27/10879 ,  H01L21/2251 ,  H01L29/0649 ,  H01L29/1054 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/41791 ,  H01L29/4236 ,  H01L29/66772 ,  H01L29/66795 ,  H01L29/7825 ,  H01L29/7838 ,  H01L29/7849 ,  H01L29/785 ,  H01L29/7855 ,  H01L29/78603 ,  H01L29/78654

Abstract: Methods and structures for forming a localized, strained region of a substrate are described. Trenches may be formed at boundaries of a localized region of a substrate. An upper portion of sidewalls at the localized region may be covered with a covering layer, and a lower portion of the sidewalls at the localized region may not be covered. A converting material may be formed in contact with the lower portion of the localized region, and the substrate heated. The heating may introduce a chemical species from the converting material into the lower portion, which creates stress in the localized region. The methods may be used to form strained-channel finFETs.

公开(公告)号：US09660057B2

公开(公告)日：2017-05-23

申请号：US14307011

申请日：2014-06-17

Applicant: STMicroelectronics, Inc. ,  International Business Machines Corporation ,  GLOBALFOUNDRIES Inc.

Inventor： Qing Liu ,  Ruilong Xie ,  Chun-chen Yeh ,  Xiuyu Cai ,  Kejia Wang

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/20 ,  H01L29/205

CPC classification number: H01L29/66795 ,  H01L29/20 ,  H01L29/205 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/785

Abstract: Methods and structures for forming a reduced resistance region of a finFET are described. According to some aspects, a dummy gate and first gate spacer may be formed above a fin comprising a first semiconductor composition. At least a portion of source and drain regions of the fin may be removed, and a second semiconductor composition may be formed in the source and drain regions in contact with the first semiconductor composition. A second gate spacer may be formed covering the first gate spacer. The methods may be used to form finFETs having reduced resistance at source and drain junctions.

公开(公告)号：US09660015B2

公开(公告)日：2017-05-23

申请号：US15082987

申请日：2016-03-28

Applicant: STMicroelectronics, Inc.

Inventor： John H. Zhang

IPC: H01L49/02 ,  H01L21/768 ,  H01L23/522 ,  H01L27/06 ,  H01L27/08 ,  H01L23/528 ,  H01L23/532

CPC classification number: H01L23/528 ,  H01L21/76802 ,  H01L21/76805 ,  H01L21/76816 ,  H01L21/76831 ,  H01L21/76834 ,  H01L21/76877 ,  H01L21/76883 ,  H01L23/5222 ,  H01L23/5223 ,  H01L23/5226 ,  H01L23/5228 ,  H01L23/53223 ,  H01L23/53238 ,  H01L23/53266 ,  H01L27/0676 ,  H01L27/0682 ,  H01L27/0802 ,  H01L28/20 ,  H01L28/24 ,  H01L28/60 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method for making a semiconductor device may include forming a first dielectric layer above a semiconductor substrate, forming a first trench in the first dielectric layer, filling the first trench with electrically conductive material, removing upper portions of the electrically conductive material to define a lower conductive member with a recess thereabove, forming a filler dielectric material in the recess to define a second trench. The method may further include filling the second trench with electrically conductive material to define an upper conductive member, forming a second dielectric layer over the first dielectric layer and upper conductive member, forming a first via through the second dielectric layer and underlying filler dielectric material to the lower conductive member, and forming a second via through the second dielectric layer to the upper conductive member.