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    Semiconductor laser chip and manufacturing method therefor
    42.
    发明专利
    Semiconductor laser chip and manufacturing method therefor 审中-公开
    半导体激光芯片及其制造方法

    公开(公告)号：JP2008218585A

    公开(公告)日：2008-09-18

    申请号：JP2007052096

    申请日：2007-03-01

    Applicant: Eudyna Devices Inc ,  ユーディナデバイス株式会社

    Inventor： FUJII TAKUYA

    IPC: H01S5/16

    Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor laser chip capable of suppressing COD, and to provide its manufacturing method. SOLUTION: A semiconductor laser chip (100) comprises a lower clad region (11a); an active layer (12), including a layer formed on the lower clad region and composed of GaAlInAs; an upper clad region (11b) formed on the active layer; and optical waveguides (13a, 13b), which are optically coupled with at least one end of the active layer, at least vertically performs light confinement, includes a layer comprising InGaAsP, and has a core with the concentration of Al which is smaller than that of the active layer. COPYRIGHT: (C)2008,JPO&INPIT

    Abstract translation: 要解决的问题：提供能够抑制COD的半导体激光器芯片，并提供其制造方法。 解决方案：半导体激光芯片（100）包括下包层区（11a）; 活性层（12），包括形成在下包层区上并由GaAlInAs构成的层; 在所述有源层上形成的上部包层区域（11b） 以及与有源层的至少一端光学耦合的光波导（13a，13b）至少垂直地进行光限制，包括包含InGaAsP的层，并且具有Al的浓度小于Al的浓度的核 的活性层。 版权所有（C）2008，JPO＆INPIT

    Semiconductor device and manufacturing method therefor
    43.
    发明专利
    Semiconductor device and manufacturing method therefor 有权
    半导体器件及其制造方法

    公开(公告)号：JP2008177405A

    公开(公告)日：2008-07-31

    申请号：JP2007010235

    申请日：2007-01-19

    Applicant: Eudyna Devices Inc ,  Fujitsu Ltd ,  ユーディナデバイス株式会社 ,  富士通株式会社

    Inventor： UETAKE MASATO ,  TAKEUCHI TATSUYA

    IPC: H01S5/227

    CPC classification number: H01S5/227 ,  B82Y20/00 ,  H01S5/026 ,  H01S5/1085 ,  H01S5/16 ,  H01S5/2201 ,  H01S5/2224 ,  H01S5/2275 ,  H01S5/3211 ,  H01S5/34306 ,  H01S5/34373 ,  H01S5/50 ,  H01S2304/04

    Abstract: PROBLEM TO BE SOLVED: To form a structure for preventing return of light at an outgoing end surface in an optical semiconductor device that is formed on a semiconductor substrate having a surface (100), has a waveguide mesa stripe, and operates in a high speed.
    SOLUTION: In a region L2 in the front region of the outgoing end face 50a on an InP substrate 41, two dummy mesa patterns M2, M3, each having the same lamination structure as that of a mesa stripe M1, are formed on both right and left sides with respect to an extension line of the mesa stripe M1 such that they are positioned in parallel with the extension direction of the mesa stripe M1 and in a bilaterally symmetric relation. In the optical semiconductor device 40, if the optical beam emitted from the outgoing end face 50a of the mesa drive M1 enters an InP embedded layer 50 formed between the dummy mesa stripes M2 and M3 in the region L2, the beam system is enlarged. As a result, even if the light reflects off the outgoing end face 50b of the semiconductor device 40, the ratio of reflection light injected into the mesa drive M1 as return light is small.
    COPYRIGHT: (C)2008,JPO&INPIT

    Abstract translation: 要解决的问题：为了形成在形成在具有表面（100）的半导体衬底上的光学半导体器件中的出射端面处的光返回结构，具有波导台面条纹，并且在 高速。 解决方案：在InP衬底41上的出射端面50a的前部区域中的区域L2中，形成与台面条状M1相同的层叠结构的两个虚拟台面图案M2，M3， 相对于台面条带M1的延伸线，左右两侧与台条M1的延伸方向平行并且以双向对称关系定位。 在光半导体装置40中，如果从台面驱动M1的出射端面50a射出的光束进入形成在区域L2中的虚拟台面条M2和M3之间的InP嵌入层50，则波束系统被放大。 结果，即使光从半导体器件40的出射端面50b反射，作为返回光而注入台面驱动器M1的反射光的比例也小。 版权所有（C）2008，JPO＆INPIT

    Semiconductor device and its manufacturing method
    44.
    发明专利
    Semiconductor device and its manufacturing method 审中-公开
    半导体器件及其制造方法

    公开(公告)号：JP2008177374A

    公开(公告)日：2008-07-31

    申请号：JP2007009619

    申请日：2007-01-18

    Applicant: Eudyna Devices Inc ,  ユーディナデバイス株式会社

    Inventor： SATOYOSHI HIROTADA ,  KAJIYAMA SATOSHI ,  GOTO OSAMU ,  SUMITOMO HIROYUKI ,  IZUMI MOICHI

    IPC: H01S5/10 ,  H01L21/301 ,  H01S5/022

    CPC classification number: H01S5/34326 ,  B82Y20/00 ,  H01S5/0201 ,  H01S5/0202 ,  H01S5/0224 ,  H01S5/02268 ,  H01S5/02272

    Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor device where an increase of manufacture cost or chipping of a semiconductor chip is suppressed, and also to provide a manufacturing method of the semiconductor device.
    SOLUTION: The semiconductor device and the manufacturing method of the device has processes of: dividing an off substrate 10 so that first faces S1 and S2 of the semiconductor device having an operation layer 18, which is installed on the off substrate 10, become first cleavage faces; and dividing the off substrate 10 so that second faces S3 and S4 crossing the first faces S1 and S2 of the semiconductor device become substantially vertical to a surface of the off substrate rather than a second cleavage face of the off substrate 10.
    COPYRIGHT: (C)2008,JPO&INPIT

    Abstract translation: 解决的问题：为了提供抑制半导体芯片的制造成本或切削的增加的半导体器件，并且还提供半导体器件的制造方法。 解决方案：半导体器件和器件的制造方法具有以下处理：将衬底10分割成具有安装在关闭衬底10上的操作层18的半导体器件的第一面S1和S2， 成为第一个解剖面; 并且分离掉基板10，使得与半导体器件的第一面S1和S2交叉的第二面S3和S4与离开基板的表面大致垂直，而不是离开基板10的第二切割面。 （C）2008，JPO＆INPIT

    Light-emitting element and its manufacturing method
    45.
    发明专利
    Light-emitting element and its manufacturing method 审中-公开
    发光元件及其制造方法

    公开(公告)号：JP2008141006A

    公开(公告)日：2008-06-19

    申请号：JP2006326124

    申请日：2006-12-01

    Applicant: Eudyna Devices Inc ,  ユーディナデバイス株式会社

    Inventor： ANAYAMA CHIKASHI ,  KURAMATA AKITO ,  HORINO KAZUHIKO ,  YUI KEIICHI

    IPC: H01L33/32

    Abstract: PROBLEM TO BE SOLVED: To provide a light-emitting element improved in luminous efficiency. SOLUTION: The light-emitting element comprises an n-type first GaN layer (16) provided on a substrate (10), an n-type InGaN contact layer (18) provided on the first GaN layer (16), an n-type second GaN layer (20) provided on the InGaN contact layer (18), an active layer (22) provided on the second GaN layer, a p-type cladding layer (24) provided on the active layer (22), and an electrode (26) provided to contact with the InGaN contact layer (18). COPYRIGHT: (C)2008,JPO&INPIT

    Abstract translation: 要解决的问题：提供发光效率提高的发光元件。 解决方案：发光元件包括设置在基板（10）上的n型第一GaN层（16），设置在第一GaN层（16）上的n型InGaN接触层（18）， 设置在InGaN接触层（18）上的n型第二GaN层（20），设置在第二GaN层上的有源层（22），设置在有源层（22）上的p型覆层（24） 和设置成与InGaN接触层（18）接触的电极（26）。 版权所有（C）2008，JPO＆INPIT

    Semiconductor device
    46.
    发明专利
    Semiconductor device 审中-公开
    半导体器件

    公开(公告)号：JP2008098455A

    公开(公告)日：2008-04-24

    申请号：JP2006279350

    申请日：2006-10-13

    Applicant: Eudyna Devices Inc ,  ユーディナデバイス株式会社

    Inventor： YAEGASHI SEIJI

    IPC: H01L21/338 ,  H01L21/28 ,  H01L29/417 ,  H01L29/778 ,  H01L29/78 ,  H01L29/786 ,  H01L29/812

    Abstract: PROBLEM TO BE SOLVED: To suppress the collapse or the like of a leak current and a drain current by reducing an interface state between an electron supply layer and an insulating layer. SOLUTION: The semiconductor device comprises a GaN electron travel layer (12) formed on a substrate (10), an AlGaN electron supply layer (14) which is formed on the electron travel layer (12) and generates a two-dimension electron gas (13) at the electron travel layer (12), a GaN layer (20) formed on the electron supply layer (14), and a gate electrode (34) formed away from the GaN layer (20) with an insulating film (32) between. COPYRIGHT: (C)2008,JPO&INPIT

    Abstract translation: 解决的问题：通过减少电子供给层和绝缘层之间的界面状态来抑制泄漏电流和漏极电流的塌陷等。 解决方案：半导体器件包括形成在衬底（10）上的GaN电子行进层（12），形成在电子行为层（12）上的AlGaN电子供应层（14），并产生二维 电子迁移层（12）的电子气（13），形成在电子供给层（14）上的GaN层（20）和与GaN层（20）形成的绝缘膜 （32）之间。 版权所有（C）2008，JPO＆INPIT

    Capacitor and electronic circuit
    47.
    发明专利
    Capacitor and electronic circuit 审中-公开
    电容器和电子电路

    公开(公告)号：JP2007294848A

    公开(公告)日：2007-11-08

    申请号：JP2006313020

    申请日：2006-11-20

    Applicant: Eudyna Devices Inc ,  ユーディナデバイス株式会社

    Inventor： KUMAGAI SEIJI

    IPC: H01L21/822 ,  H01G4/33 ,  H01G4/38 ,  H01L27/04

    CPC classification number: H01G4/228 ,  H01G4/33 ,  H01G4/38 ,  H01L23/5223 ,  H01L28/40 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: PROBLEM TO BE SOLVED: To provide a capacitor capable of suppressing a difference of a capacity value caused by a polarity of the capacitor, and an electronic circuit thereof. SOLUTION: The capacitor is equipped with: two sub capacitors 20a, 20b respectively having lower electrodes 12a, 12b provided on a substrate 10, dielectric films 14a, 14b provided on the lower electrodes 12a, 12b, respectively, and an upper electrodes 16a, 16b provided on the dielectric film 14a, 14b, respectively; and two connecting portions L1, L2 respectively connecting the lower electrode 12a, 12b of the two sub capacitors 20a, 20b with the upper electrode 16b, 16a of the other sub capacitor of the two sub capacitors 20a, 20b. The electronic circuit thereof is also provided. COPYRIGHT: (C)2008,JPO&INPIT

    Abstract translation: 要解决的问题：提供一种能够抑制由电容器的极性引起的电容值的差异的电容器及其电子电路。 电容器配备有：分别具有设置在基板10上的下部电极12a，12b，分别设置在下部电极12a，12b上的电介质膜14a，14b和上部电极的两个副电容器20a，20b， 16a，16b分别设置在电介质膜14a，14b上; 分别将两个副电容器20a，20b的下电极12a，12b与两个副电容器20a，20b的另一副电容器的上电极16b，16a分别连接的两个连接部分L1，L2。 还提供其电子电路。 版权所有（C）2008，JPO＆INPIT

    Electronic device, its control method, and optical semiconductor module
    48.
    发明专利
    Electronic device, its control method, and optical semiconductor module 有权
    电子设备，其控制方法和光学半导体模块

    公开(公告)号：JP2007274797A

    公开(公告)日：2007-10-18

    申请号：JP2006096050

    申请日：2006-03-30

    Applicant: Eudyna Devices Inc ,  ユーディナデバイス株式会社

    Inventor： INOUE SHINGO

    IPC: H02M3/00 ,  G06F3/00 ,  H01L31/10 ,  H01S5/042

    CPC classification number: H02J1/06 ,  H02M3/156

    Abstract: PROBLEM TO BE SOLVED: To provide an electronic device that can reduce the power consumption of an electronic circuit, to provide its control method, and to provide an optical semiconductor module. SOLUTION: The electronic device comprises a DC-DC converter (20) to which external power is inputted, and the electronic circuit (50) in which an output of the DC-DC converter (20) is inputted to a power supply input. A conversion voltage as the output of the DC-DC converter (20) is lower than a central value of a recommended operational condition of an voltage of the power supply input of the electronic circuit (50). There are also provided the control method of the device, and the optical semiconductor module. COPYRIGHT: (C)2008,JPO&INPIT

    Abstract translation: 要解决的问题：提供一种可以降低电子电路的功耗，提供其控制方法并提供光半导体模块的电子设备。 解决方案：电子设备包括输入外部电力的DC-DC转换器（20）和将DC-DC转换器（20）的输出输入到电源的电子电路（50） 输入。 作为DC-DC转换器（20）的输出的转换电压低于电子电路（50）的电源输入的电压的推荐工作状态的中心值。 还提供了该装置的控制方法和光半导体模块。 版权所有（C）2008，JPO＆INPIT

    Electronic circuit
    49.
    发明专利
    Electronic circuit 审中-公开
    电子电路

    公开(公告)号：JP2007274127A

    公开(公告)日：2007-10-18

    申请号：JP2006094713

    申请日：2006-03-30

    Applicant: Eudyna Devices Inc ,  ユーディナデバイス株式会社

    Inventor： TATSUMI TAIZO ,  SAWADA SOSAKU

    IPC: H03G3/20 ,  H03G3/30

    CPC classification number: H03F3/087 ,  H03F1/08 ,  H03F2200/78

    Abstract: PROBLEM TO BE SOLVED: To provide an electronic circuit capable of reducing the transimpedance of a transimpedance amplifier.
    SOLUTION: The electronic circuit includes: a control circuit (110) for controlling the gain of the transimpedance amplifier (100) by drawing a part of the input electric current of the transimpedance amplifier (100), based on the output voltage of the transimpedance amplifier (100); and a PIN diode (D1) which is arranged between the input of the transimpedance amplifier (100) and the control circuit (110), and connected in a forward direction with respect to the electric current to be drawn by the control circuit (110).
    COPYRIGHT: (C)2008,JPO&INPIT

    Abstract translation: 要解决的问题：提供能够减少跨阻放大器的跨阻抗的电子电路。 解决方案：电子电路包括：控制电路（110），用于通过基于所述跨阻抗放大器（100）的输入电流的一部分来控制跨阻抗放大器（100）的增益， 跨阻放大器（100）; 以及布置在跨阻抗放大器（100）的输入端和控制电路（110）之间并相对于由控制电路（110）引出的电流向正方向连接的PIN二极管（D1） 。 版权所有（C）2008，JPO＆INPIT

    Optical semiconductor device and control method thereof
    50.
    发明专利
    Optical semiconductor device and control method thereof 有权
    光学半导体器件及其控制方法

    公开(公告)号：JP2007273735A

    公开(公告)日：2007-10-18

    申请号：JP2006097707

    申请日：2006-03-31

    Applicant: Eudyna Devices Inc ,  ユーディナデバイス株式会社

    Inventor： ISHIKAWA TSUTOMU ,  FUJII TAKUYA

    IPC: H01S5/12 ,  H01S5/0687

    CPC classification number: H01S5/02276 ,  G02F1/0147 ,  H01L2224/48091 ,  H01S5/024 ,  H01S5/0261 ,  H01S5/028 ,  H01S5/0425 ,  H01S5/0612 ,  H01S5/06256 ,  H01S5/06804 ,  H01S5/1209 ,  H01S5/125 ,  H01L2924/00014

    Abstract: PROBLEM TO BE SOLVED: To provide an optical semiconductor device capable of more correctly controlling an oscillation wavelength, and a control method thereof.
    SOLUTION: The optical semiconductor device has a wavelength variable semiconductor laser chip (40) provided with a first optical waveguide (4), and a second optical waveguide (3) provided with a heater (9) on its surface and optically coupled to the first optical waveguide (4); a mount carrier (30) for mounting the wavelength variable semiconductor laser chip; a first temperature sensor (35) arranged on a first region (54), a region on the mount carrier, of any one of both sides of the wavelength variable semiconductor chip biased to the first optical waveguide rather than the second optical waveguide of the wavelength semiconductor laser chips; and a wire (37) to be connected to the heater provided so as to extend to a region of the mount carrier other than the first region.
    COPYRIGHT: (C)2008,JPO&INPIT

    Abstract translation: 解决的问题：提供能够更正确地控制振荡波长的光半导体装置及其控制方法。 解决方案：光学半导体器件具有设置有第一光波导（4）的波长可变半导体激光器芯片（40）和在其表面上设置有加热器（9）的第二光波导（3），并且光耦合 到第一光波导（4）; 用于安装波长可变半导体激光芯片的安装载体（30）; 第一温度传感器（35），布置在第一区域（54）上，安装载体上的区域，偏振到第一光波导的波长可变半导体芯片的两侧中的任一侧，而不是波长的第二光波导 半导体激光芯片; 以及连接到加热器的导线（37），其被设置成延伸到除了第一区域之外的安装载体的区域。 版权所有（C）2008，JPO＆INPIT

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