Abstract:
A high performance antenna incorporated on a microelectronic substrate by forming low-loss dielectric material structures in the microelectronic substrates and forming the antenna on the low-loss dielectric material structures. The low-loss dielectric material structures may be fabricated by forming a cavity in a build-up layer of the microelectronic substrate and filling the cavity with a low-loss dielectric material.
Abstract:
Methods of forming a microelectronic packaging structure and associated structures formed thereby are described. Those methods and structures may include forming a package structure comprising a discrete antenna disposed on a back side of a device, wherein the discrete antenna comprises an antenna substrate, a through antenna substrate via vertically disposed through the antenna substrate. A through device substrate via that is vertically disposed within the device is coupled with the through antenna substrate via, and a package substrate is coupled with an active side of the device.
Abstract:
Switched capacitor networks for power delivery to packaged integrated circuits. In certain embodiments, the switched capacitor network is employed in place of at least one stage of a cascaded buck converter for power delivery. In accordance with particular embodiments of the present invention, a two-stage power delivery network comprising both switched capacitor stage and a buck regulator stage deliver power to a microprocessor or other packaged integrated circuit (IC). In further embodiments, a switched capacitor stage is implemented with a series switch module comprising low voltage MOS transistors that is then integrated onto a package of at least one IC to be powered. In certain embodiments, a switched capacitor stage is implemented with capacitors formed on a motherboard, embedded into an IC package or integrated into a series switch module.
Abstract:
A passive equalizer circuit is embedded within a substrate of a package containing an integrated circuit. It is believed that substantial reduction in uneven frequency dependent loss may be achieved for interconnects interconnecting the integrated circuit with other integrated circuits on a printed circuit board. Other aspects are described and claimed.
Abstract:
An apparatus includes a radio-frequency die with shielding through-silicon vias and a die backside lattice lid that shield a sector in the RF die from radio - and electromagnetic interference.
Abstract:
A microelectronic package having a radio frequency (RF) amplifier circuit and, incorporating harmonic rejection filters and matching circuits integrally formed in the package is disclosed. A harmonic rejection filter may comprise a metal-insulator-metal (MIM) capacitor serially coupled between bond pads disposed on a RF amplifier circuit die, a first wire bond coupling a first bond pad to a package output, where the first bond pad is coupled to the output of the RF amplifier, and a second wire bond coupling a second bond pad to a package ground. The harmonic rejection filter may be appropriately configured to filter one or more harmonics at different frequencies.
Abstract:
A planar transformer or balun device, having small trace spacing and high mutual coupling coefficient, and a method of fabricating the same is disclosed. The method may comprise providing a first and a second inductor on a primary and a second substrate respectively, interleaving at least partially the first inductor with the second inductor, coupling the primary and the secondary substrates to form a unitary structure, and providing electrical contacts to couple the first and second inductors with another device or circuit.
Abstract:
A planar transformer or balun device, having small trace spacing and high mutual coupling coefficient, and a method of fabricating the same is disclosed. The method may comprise providing a first and a second inductor on a primary and a second substrate respectively, interleaving at least partially the first inductor with the second inductor, coupling the primary and the secondary substrates to form a unitary structure, and providing electrical contacts to couple the first and second inductors with another device or circuit.
Abstract:
Switched capacitor networks for power delivery to packaged integrated circuits. In certain embodiments, the switched capacitor network is employed in place of at least one stage of a cascaded buck converter for power delivery. In accordance with particular embodiments of the present invention, a two-stage power delivery network comprising both switched capacitor stage and a buck regulator stage deliver power to a microprocessor or other packaged integrated circuit (IC). In further embodiments, a switched capacitor stage is implemented with a series switch module comprising low voltage MOS transistors that is then integrated onto a package of at least one IC to be powered. In certain embodiments, a switched capacitor stage is implemented with capacitors formed on a motherboard, embedded into an IC package or integrated into a series switch module.
Abstract:
A planar transformer or balun device, having small trace spacing and high mutual coupling coefficient, and a method of fabricating the same is disclosed. The method may comprise providing a first and a second inductor on a primary and a second substrate respectively, interleaving at least partially the first inductor with the second inductor, coupling the primary and the secondary substrates to form a unitary structure, and providing electrical contacts to couple the first and second inductors with another device or circuit.