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公开(公告)号：KR1020040078711A
公开(公告)日：2004-09-13
申请号：KR1020030013503
申请日：2003-03-04
Applicant: 삼성전자주식회사
IPC: G11B7/004
Abstract: PURPOSE: A device for generating a reproduction clock of an optical disk where a wobble signal is recorded and a method therefor are provided to more exactly reproduce a phase-modulated wobble signal to display position information by being recorded on an optical disk, thereby exactly detecting the position information. CONSTITUTION: An oscillator(3) generates a system clock. A frequency divider(4) divides the system clock, and outputs a signal having the first frequency. A phase error detector(5) inputs a wobble signal having the second frequency and the first frequency signal from the frequency divider(4), detects a phase error between the first frequency signal and the wobble signal, and outputs a phase error signal. An oscillator controller(2) outputs a control signal for adjusting synchronization between the system clock and the wobble signal to the oscillator(3) by using the phase error signal.
Abstract translation: 目的：提供记录摆动信号的光盘的再现时钟的装置及其方法，以更准确地再现相位调制的摆动信号，通过记录在光盘上来显示位置信息，从而精确地检测 位置信息。 构成：振荡器（3）产生系统时钟。 分频器（4）划分系统时钟，并输出具有第一频率的信号。 相位误差检测器（5）输入具有来自分频器（4）的第二频率和第一频率信号的摆动信号，检测第一频率信号和摆动信号之间的相位误差，并输出相位误差信号。 振荡器控制器（2）通过使用相位误差信号向振荡器（3）输出用于调整系统时钟和摆动信号之间的同步的控制信号。
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公开(公告)号：KR1020040023419A
公开(公告)日：2004-03-18
申请号：KR1020020055135
申请日：2002-09-11
Applicant: 삼성전자주식회사
IPC: G11B7/007
Abstract: PURPOSE: An information recording medium, and a device and a method for recording/playing the same are provided to record information data by using an RLL(Run Length Limited) modulation method for the information data in a user area and using a bi-phase modulation method for the information data in an additional information area. CONSTITUTION: The first modulator/synchronization inserter(41) performs the RLL modulation for the data recorded to the user area according to a modulation clock signal generated from a clock rate converter(43) and inserts a synchronization pattern. The second modulator/synchronization inserter(42) performs the bi-phase modulation for the data recorded to the additional information area according to a bi-phase clock signal generated from the clock rate converter and inserts the synchronization pattern. A selector(45) selects the modulated stream of the first modulator/synchronization inserter or an output stream of the bit expander. A recording waveform generator(46) outputs a recording pulse by generating the selected bit stream into a waveform finally recorded to the disc.
Abstract translation: 目的：提供一种信息记录介质及其记录/播放方法，用于通过使用用户区域中的信息数据的RLL（运行长度限制）调制方法来记录信息数据，并使用双相 在附加信息区域中的信息数据的调制方法。 构成：第一调制器/同步插入器（41）根据从时钟速率转换器（43）产生的调制时钟信号，对记录到用户区域的数据执行RLL调制，并插入同步模式。 第二调制器/同步插入器（42）根据从时钟速率转换器产生的双相时钟信号对记录到附加信息区域的数据执行双相调制，并插入同步模式。 选择器（45）选择第一调制器/同步插入器的调制流或位扩展器的输出流。 记录波形发生器（46）通过将所选择的比特流生成最终记录到盘的波形来输出记录脉冲。
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43.发明公开
公开(公告)号：KR1020040017383A
公开(公告)日：2004-02-27
申请号：KR1020020049425
申请日：2002-08-21
Applicant: 삼성전자주식회사
IPC: G11B20/10
CPC classification number: G11B27/24 , G11B7/0053 , G11B7/24082 , G11B20/1403 , G11B20/18 , G11B27/3027 , G11B2020/1823 , G11B2020/1836 , G11B2220/216 , G11B2220/218 , G11B2220/2562
Abstract: PURPOSE: A method and a device for address data modulation, a method and a device for demodulating the address data, and a recording medium are provided to reduce the physical length of disc tracks to which wobble signals are formed for representing address information, by modulating at least two bit or more data per a single unit wobble signal, thereby reducing the data loss even in the case of disc defect. CONSTITUTION: A device for address data modulation includes an address generating part(110), an error correction coding part(120), a modulating part(130), and a wobble generating part(140). The modulating part includes the first and second modulators(131,133). The address generating part generates address data for recording data in a preset sequence. The error correction coding part receives address data from the address generating part and carries out error correction coding. The modulating part generates first and second modulating signals according to the first and second modulating methods as the error correction coded data by 2-bit unit.
Abstract translation: 目的：提供一种用于地址数据调制的方法和装置，用于解调地址数据的方法和装置以及记录介质，以通过调制来减少形成摆动信号的盘轨道的物理长度，以表示地址信息 每单个摆动信号至少有两位或更多数据，从而即使在盘缺陷的情况下也减少了数据丢失。 构成：用于地址数据调制的装置包括地址产生部分（110），纠错编码部分（120），调制部分（130）和摆动产生部分（140）。 调制部分包括第一和第二调制器（131,133）。 地址生成部生成用于以预设顺序记录数据的地址数据。 纠错编码部分从地址产生部分接收地址数据并执行纠错编码。 调制部分根据第一和第二调制方法产生第二和第二调制信号作为2位单位的纠错编码数据。
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公开(公告)号：KR1020030080873A
公开(公告)日：2003-10-17
申请号：KR1020020019721
申请日：2002-04-11
Applicant: 삼성전자주식회사
IPC: G11B20/18
CPC classification number: H03L7/18 , G11B7/007 , G11B20/1403 , G11B27/24 , G11B2220/216 , G11B2220/218 , G11B2220/2545 , G11B2220/2575 , H03L7/085
Abstract: PURPOSE: An apparatus for detecting and correcting a wobble error and a phase locked loop using the same are provided to improve the performance of an optical recording medium recording and playback system by detecting and correcting the wobble error. CONSTITUTION: A pre-processor(500) reads a wobble signal recorded on an optical recording medium(50) for binarizing the wobble signal to output a raw wobble signal. A wobble error detecting and correcting unit(510) detects an error included in the raw signal and outputs a PLL(Phase Locked Loop)ed wobble signal. A window generator generates a window signal having a predetermined width. A control logic(512) checks the abnormality of the raw signal by using the window signal, and corrects the abnormality of the raw signal.
Abstract translation: 目的：提供一种用于检测和校正摆动误差的装置和使用其的锁相环，以通过检测和校正摆动误差来改善光记录介质记录和重放系统的性能。 构成：预处理器（500）读取记录在光学记录介质（50）上的摆动信号，用于二值化摆动信号以输出原始摆动信号。 摆动误差检测和校正单元（510）检测原始信号中包括的错误，并输出PLL（锁相环）摆动信号。 窗口生成器产生具有预定宽度的窗口信号。 控制逻辑（512）通过使用窗口信号来检查原始信号的异常，并且校正原始信号的异常。
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公开(公告)号：KR1020020092678A
公开(公告)日：2002-12-12
申请号：KR1020010031452
申请日：2001-06-05
Applicant: 삼성전자주식회사
IPC: G11B20/10
CPC classification number: G11B20/1426 , G11B7/004
Abstract: PURPOSE: A code conversion and demodulation method for removing DC components is provided to efficiently remove a larger amount of DC components from code streams. CONSTITUTION: Source data is inputted. It is judged whether it is a point of time for controlling DC component of a code stream. When it is the point of time for DC control, the source data is converted corresponding to a codeword from one group among code groups made for DC control. When it is not the point of time for DC control, a codeword corresponding to the source data is found from one group among code groups made with a format for recording data in an optical information storage medium and the found codeword is converted. Code groups for the next source data conversion are designated according to the number of end zeros of the converted codeword. The boundary between codewords of the code stream obtained by adding up the converted codeword and previously converted codeword is inspected. When the inspected result does not meet a predetermined condition, the previously converted codeword is changed.
Abstract translation: 目的：提供一种用于去除直流分量的代码转换和解调方法，以便有效地从代码流中移除更大量的直流分量。 构成：输入源数据。 判断是否是用于控制码流的DC分量的时间点。 当是DC控制的时间点时，源数据被对应于来自用于DC控制的代码组中的一组的码字转换。 当不是DC控制的时间点时，从光学信息存储介质中用于记录数据的格式制成的代码组中的一组中找到与源数据相对应的码字，并且发现的码字被转换。 根据转换的码字的末尾数量，指定下一个源数据转换的代码组。 检查通过将经转换的码字和先前转换的码字相加而获得的码流的码字之间的边界。 当检查结果不满足预定条件时，改变先前转换的码字。
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Patent Agency Ranking
公开(公告)号：KR100334437B1
公开(公告)日：2002-09-26
申请号：KR1019980049543
申请日：1998-11-18
Applicant: 삼성전자주식회사
IPC: G11B20/04
Abstract: 개시된 내용은 광디스크시스템을 구성하는 검출기의 기준레벨을 입력신호에 따라 적응적으로 변화시켜 주므로써, 재생신호에 포함된 애시메트리(asymmetry)를 효과적으로 보정하는 광디스크시스템의 재생신호 애시메트리 보정장치에 관한 것이다. 본 발명은 광디스크로부터 재생하여 신호처리에 용이하도록 변환시킨 신호와, 상기 장치에서 피드백되는 애시메트리보정신호를 가산하므로써 애시메트리를 보정하는 가산기, 가산기의 출력신호에 포함되어 있는 애시메트리 보정을 위한 소정부호신호를 일정의 조건에 따라 계수하여, 그 계수값에 따라 애시메트리보정을 제어하는 제어신호를 출력하는 카운터 및, 카운터의 제어신호에 따라 애시메트리를 보정하기 위한 애시메트리보정신호를 상기 가산기로 출력하는 애시메트리보정기를 포함하고 있다. 따라서, 본 발명은 신호처리를 위한 기준레벨을 광디스크로부터 재생된 신호에 따라 적응적으로 변화시켜 주므로써, 재생신호에 포함된 애시메트리(asymmetry)를 효과적으로 보정하는 효과가 있다.
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公开(公告)号：KR100322135B1
公开(公告)日：2002-02-04
申请号：KR1019990008080
申请日：1999-03-11
Applicant: 삼성전자주식회사
IPC: G02B6/10
CPC classification number: G02B6/03694 , G02B6/02095 , G02B6/021 , G02B6/02114 , G02B6/02147 , G02B6/03627
Abstract: 본발명은잔류기계적스트레스를최대화하는광섬유및 이를이용한광섬유격자에관한것으로서, 특히광섬유격자의제작을위하여기계적스트레스를최대화한광섬유는, 광을도파하며본질적으로실리카로형성된코아; 및상기코아주위를둘러싸며본질적으로실리카에붕소을도핑하여형성된클래딩을포함하거나, 광을도파하며본질적으로실리카에인(P)을도핑하여형성된코아; 및상기코아주위를둘러싸며본질적으로실리카로형성된클래딩을포함하며, 광섬유의코아또는클래딩에점성률을낮추는효과가큰 인이나붕소을첨가함으로써잔류기계적스트레스를크게하여보다효과적으로광섬유격자를제작할수 있다.
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公开(公告)号：KR100311014B1
公开(公告)日：2001-11-15
申请号：KR1019980028659
申请日：1998-07-15
Applicant: 삼성전자주식회사
Inventor： 박현수
IPC: H03L7/00
Abstract: 본 발명은 주파수 검출 장치 및 방법에 관한 것으로서, 특히 디지털 위상제어루프에서 낮은 클럭 주파수를 가지고도 높은 해상도를 갖는 디지털 위상제어루프에서의 주파수 검출 장치 및 방법에 관한 것이다.
본 발명에 의하면 기준 클럭 신호의 주파수를 2배 높이지 않고도 기준 클럭 주파수만으로 2채배된 클럭을 사용하는 것과 거의 유사한 해상도를 갖는 주파수 검출을 실행함으로써, 주파수 검출을 정밀하게 할 수 있으므로 데이터 품질을 향상시킬 수 있는 효과가 있다.-
公开(公告)号：KR1020000074813A
公开(公告)日：2000-12-15
申请号：KR1019990019020
申请日：1999-05-26
Applicant: 삼성전자주식회사
IPC: H03L7/087
CPC classification number: G11B20/10037 , G11B20/10203 , G11B20/1403 , H03L7/0807 , H03L7/087 , H03L7/113 , H04L7/033 , H04L7/0331 , H04L7/0334
Abstract: PURPOSE: A circuit and method for restoring digital clocks are provided which stably generates a system clock signal corresponding to a variety of discs, to improve system reliability. CONSTITUTION: A circuit for restoring a system clock signal synchronized with an input signal includes an analog/digital converter(210) for converting an input analog signal into a digital signal and providing digital data that has been corrected according to a binary level following the center value of the input signal, a frequency error detector(230) for detecting frequency error from the corrected digital data, and a phase error detector(240) for detecting phase error from the corrected digital data. The circuit also has a digital low pass filter(250) for providing the frequency error and phase error as a control voltage, and a clock generator for generating a system clock signal whose frequency and phase are varied based on the control voltage and providing it as a clock signal for driving the above-described elements.
Abstract translation: 目的：提供一种用于恢复数字时钟的电路和方法，其稳定地生成对应于各种盘的系统时钟信号，以提高系统的可靠性。 构成：用于恢复与输入信号同步的系统时钟信号的电路包括一个模拟/数字转换器（210），用于将输入的模拟信号转换为数字信号，并提供已根据中心之后的二进制电平校正的数字数据 输入信号的值，用于从校正的数字数据检测频率误差的频率误差检测器（230），以及用于从校正的数字数据检测相位误差的相位误差检测器（240）。 该电路还具有用于提供频率误差和相位误差作为控制电压的数字低通滤波器（250），以及时钟发生器，用于产生其频率和相位根据控制电压而变化的系统时钟信号，并将其提供为 用于驱动上述元件的时钟信号。
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公开(公告)号：KR1020000066691A
公开(公告)日：2000-11-15
申请号：KR1019990013983
申请日：1999-04-20
Applicant: 삼성전자주식회사
Inventor： 박현수
IPC: G11B7/09
CPC classification number: G11B7/005 , G11B7/00375 , G11B7/08505 , G11B27/22 , G11B2220/2545 , G11B2220/2562
Abstract: PURPOSE: A circuit for detecting a blank of a disk and detecting method realizes a digital circuit for converting a RF signal read from the disk into a digital signal and then rapidly and exactly detecting the blank of the disk. CONSTITUTION: A circuit for detecting a blank of a reproducing signal read from a disk comprises an edge detector(104) for detecting an edge of the reproducing signal and detecting a gap between the edges, a maximum and minimum value detector(106) for detecting an amplitude of the reproducing signal to provide a maximum and minimum value of the amplitude, a deciding portion(108) for deciding whether the reproducing signal is blank or not according to the gap and the maximum and minimum value. The circuit further comprises an analog-digital converter(102) for converting the reproducing signal into a digital signal and then provide the digital signal to the edge detector and the maximum and minimum value detector, and a blank signal generator(110) for generating a blank signal responding to a result from the deciding portion.
Abstract translation: 目的：用于检测盘的空白和检测方法的电路实现数字电路，用于将从盘读取的RF信号转换为数字信号，然后快速准确地检测盘的空白。 构成：用于检测从盘读取的再现信号的空白的电路包括用于检测再现信号的边沿并检测边缘之间的间隙的边缘检测器（104），用于检测的最大和最小值检测器（106） 提供幅度的最大和最小值的再现信号的幅度，用于根据间隙和最大值和最小值来判定再现信号是否为空的判定部分（108）。 该电路还包括用于将再现信号转换为数字信号的模拟数字转换器（102），然后将数字信号提供给边缘检测器和最大值和最小值检测器，以及用于产生信号的空白信号发生器（110） 响应于来自判定部分的结果的空白信号。
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