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公开(公告)号:JPH07184205A
公开(公告)日:1995-07-21
申请号:JP34805093
申请日:1993-12-22
Applicant: CASIO COMPUTER CO LTD
Inventor: MURAYAMA YOICHI , MATSUI SHINICHI
IPC: H04N5/92 , G06T9/00 , H04N19/107 , H04N19/126 , H04N19/152 , H04N19/172 , H04N19/196 , H04N19/423 , H04N19/46 , H04N19/463 , H04N19/50 , H04N19/503 , H04N19/51 , H04N19/517 , H04N19/60 , H04N19/61 , H04N19/625 , H04N19/70 , H04N19/85 , H04N19/91 , H04N7/30 , H04N7/32
Abstract: PURPOSE:To realize the picture coder in which efficient block processing is provided to improve the efficiency for a video telephone system or the like. CONSTITUTION:A moving picture processing unit is made up of a coder 1 consisting of a clock conversion section 12 converting a coded block into a block along with a face picture, an adder 13, a DCT arithmetic section 14, a quantization section 15, an entropy coding section 16, a buffer 17 and a moving inter-frame prediction section 18 or the like, and up of a decoder 2 consisting of a buffer 23, an entropy decoding section 24, an inverse quantization section 25, an IDCT arithmetic section 26, an adder 27, a prediction device 28 and a moving picture interpolation section 29 or the like, and the block conversion section 12 selects a block processing in which picture data are segmented at an optional position along the sequence of lateral scanning or a block processing in which entire basic processing is processed along with a face picture.
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公开(公告)号:JPH0681285B2
公开(公告)日:1994-10-12
申请号:JP4603285
申请日:1985-03-08
Applicant: CASIO COMPUTER CO LTD
Inventor: MATSUI SHINICHI , YAMAGISHI KOJI
IPC: H04N5/66
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公开(公告)号:JPH0636024A
公开(公告)日:1994-02-10
申请号:JP21367192
申请日:1992-07-17
Applicant: CASIO COMPUTER CO LTD
Inventor: MATSUI SHINICHI
Abstract: PURPOSE:To eliminate the need for end point processing and enable efficient image filtering. CONSTITUTION:The image filtering device is provided with an image memory 21 which stores an input image and an output image after filtering, a scanning part 22 which scans the image memory 21 zigzag to read the image data out of the image memory 21, and a filter part 23 which filters the image data read out of the image memory 21 and outputs the data to the image memory 21, and the scanning part 22 is equipped with a 270-away up/down counter 31 which counts up to the number of pixels (720) of one lateral line in up mode and then counts down in the following down mode repeatedly and a 480-aray up/ down counter 32 which counts up to the number of pixels (480) of one longitudinal line in up mode and then counts down in the following down mode repeatedly, thereby performing zigzag sampling from an input screen.
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公开(公告)号:JPH0630393A
公开(公告)日:1994-02-04
申请号:JP20726892
申请日:1992-07-10
Applicant: CASIO COMPUTER CO LTD
Inventor: MATSUI SHINICHI
Abstract: PURPOSE:To realize a QMF with simple configuration and to calculate the QMF serially with high efficiency. CONSTITUTION:A multiplexer section I of a QMF equipment is provided with paths 11, 12 dividing an input IN into two components in two time axis directions, a sub sample 14 executing sub sampling to an output of a delay 13 delaying the input provided to the path 11 on one of the divided time axes, a sub sample 15 executing stub sampling to the divided input provided on the path 12, an AB switch 16 selecting an output (b) sub sampled by the sub sample 15, a negative gain 19 giving a negative gain to the output (b) and an adder 18 adding a sub sample output (b) outputted via the AB switch 16 to an output (a) sub sampled by the sub sample 14 and outputting a scum output (c), and executes the arithmetic operation on the time axis while multiplexing it by setting the delay 13 onto the time axis.
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公开(公告)号:JPH04280189A
公开(公告)日:1992-10-06
申请号:JP41583590
申请日:1990-12-29
Applicant: CASIO COMPUTER CO LTD
Inventor: MATSUI SHINICHI
Abstract: PURPOSE:To reduce block distortion considerably and to obtain a moving picture with high picture quality by using an LOT arithmetic means for picture compression and expansion. CONSTITUTION:The device is provided with LOT 41,42 and an ILOT 43 using a basic function superposing data between adjacent blocks so as to execute a superpose orthogonal transformation (LOT) operation or inverse superpose orthogonal transformation arithmetic operation in place of discrete cosine transformation arithmetic means executing discrete cosine transformation to a picture data. The LOT is a linear transformation and the order of processing is reversed to that of an adder and subtractor and L0T.IL0T=E is established, then the order of processing is reversed by neglecting an MC. That is, the order of the MC and the LOT transformation is reversed to able to use the LOT 41,42 thereby introducing the LOT 41,42 to a moving picture device 40. Thus, noise at block border is reduced in the moving picture compression and expansion and block distortion is lost and the picture quality is remarkably improved.
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公开(公告)号:JPS6283726A
公开(公告)日:1987-04-17
申请号:JP22439885
申请日:1985-10-08
Applicant: CASIO COMPUTER CO LTD
Inventor: MATSUI SHINICHI , YAMAGISHI KOJI
Abstract: PURPOSE:To obtain the driving system suitable to the liquid crystal by providing the segment electrode driving means to invert the driving signal in accordance with the frame clock and the frame clock generating means to invert the signal level of the frame clock each time the common electrode is driven by the number set beforehand. CONSTITUTION:When one prescribed terminal out of the external terminals for setting the switch signal is grounded, only a switch circuit 22b of a signal converting circuit 15 is turned on and an output counting value N is set to '2', each time a binary counter 21 counts a common shift clock phin two times, the signal sent from the terminal 2 to an EX or circuit 24 is inverted. As the result, a frame clock phif' outputted from the EX or circuit 24, each time two common shifting clocks phin are given, is alternately inverted between the levels of a '1' signal and a '0' signal, and a driver 18 at the scanning side inverts the output signal in accordance with the frame clock phif' namely, inverts successively each time two common electrodes X of a common electrode X of a liquid crystal displaying panel 16 are driven. Thus, by the intermediate effective frequency of the B system and the common inverting system, the liquid crystal can be displayed and driven.
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公开(公告)号:JPS61295773A
公开(公告)日:1986-12-26
申请号:JP13733285
申请日:1985-06-24
Applicant: CASIO COMPUTER CO LTD
Inventor: YAMAGISHI KOJI , MATSUI SHINICHI
Abstract: PURPOSE:To offer a television receiver by liquid crystal display in which the motion of an indicator is controlled to be changed analogously with making it smaller changing a channel indicator by every one line setting two lines of scanning electrodes as a unit. CONSTITUTION:A liquid crystal driving part 72 displays and drives a channel displaying part 13 when an input signal is '1'. With setting a latching circuit 68, and after that, during two pulses in a scanning electrode data shift signal phin are outputted, the output signal CH of an AND circuit 70 is held at a signal '1' level and from the AND circuit 70, channel displaying signals CH1-CH128 corresponding to the count value of an updown counter 51 are outputted and are sent to the liquid crystal driving part 72 and every two lines in the scanning electrode at the channel displaying part 13 are displayed and driven as the channel indicator and the channel indicator is moved by every one line according to the operation of a channel up/down key.
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公开(公告)号:JP2011172266A
公开(公告)日:2011-09-01
申请号:JP2011098987
申请日:2011-04-27
Applicant: Casio Computer Co Ltd , カシオ計算機株式会社
Inventor: SASAKI MASAAKI , MATSUI SHINICHI
IPC: H04N5/232 , H04N5/225 , H04N101/00
Abstract: PROBLEM TO BE SOLVED: To detect camera shake and image blurring with high accuracy, and to record an image in the state where there is no camera shake or image blurring.
SOLUTION: At first, a rough degree of image blurring is determined by using a global motion vector. After it is determined that the image blurring is converged to some extent, the degree of image blurring is determined more in details, by using a difference value between image frames. Then, when it is determined that there is no image blurring, photographic recording is performed. As a result, photography is surely performed in timing without camera shake or image blurring.
COPYRIGHT: (C)2011,JPO&INPITAbstract translation: 要解决的问题:以高精度检测相机抖动和图像模糊,并且在没有相机抖动或图像模糊的状态下记录图像。 解决方案:首先,通过使用全局运动矢量确定粗略的图像模糊程度。 在确定图像模糊在某种程度上收敛之后,通过使用图像帧之间的差值来更详细地确定图像模糊程度。 然后,当确定没有图像模糊时,执行照相记录。 因此,无需相机抖动或图像模糊就可以在拍摄时进行拍摄。 版权所有(C)2011,JPO&INPIT
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公开(公告)号:JP2000316157A
公开(公告)日:2000-11-14
申请号:JP12491599
申请日:1999-04-30
Applicant: CASIO COMPUTER CO LTD
Inventor: MATSUI SHINICHI
IPC: H04N19/50 , H04N11/04 , H04N19/103 , H04N19/176 , H04N19/186 , H04N19/423 , H04N19/44 , H04N19/503 , H04N19/51 , H04N19/523 , H04N19/60 , H04N19/61 , H04N19/625 , H04N19/85 , H04N7/32 , H04N7/30
Abstract: PROBLEM TO BE SOLVED: To obtain a picture reproducing device for easily realizing conversion into an original color signal by reducing arithmetic amounts at the time of converting a luminance signal and a color difference signal into an original color signal. SOLUTION: At the time of RGB-converting a picture signal constituted of a luminance signal and a color difference signal, a picture reproducing device 1 directly reads an equivalent picture part of the RGB converted past picture data as a reference picture without executing RGB conversion to MB whose moving vector is expressed in integral pixel unit as for the inter MB without any DCT coefficient. Thus, it is possible to omit any arithmetic operation related with the RGB conversion.
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公开(公告)号:JPH11298612A
公开(公告)日:1999-10-29
申请号:JP11025098
申请日:1998-04-06
Applicant: CASIO COMPUTER CO LTD
Inventor: MATSUI SHINICHI
Abstract: PROBLEM TO BE SOLVED: To shorten the blank time of communication owing to negotiation and to improve a body feeling image by using both of one division band and the other division band from the point of time of ending the negotiation and constituting a digital telephone line. SOLUTION: In the case of using this equipment as a video telephone, a band division circuit 32 is operated and the bit rate of a transmission line is divided into 1/2 each. Then, an analog telephone line is constituted of one channel (A) and the negotiation of the other channel (B) is performed on the background. When the negotiation of the B channel is ended, the digital telephone line is constituted of the B channel, a conversation performed in the A channel, is shifted to the B channel and then, the negotiation of the A channel is started. Finally, when the negotiation of the A channel is ended, the two of the A channel and the B channel are used, that is the bit rate is doubled, and a video telephone line is constituted.
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