Abstract:
An electrical contact formed from a plurality of interlaced and annealed wires by weaving or braiding the wires together to form a mesh, annealing the mesh, and cutting the annealed mesh so as to form a plurality of individual electrical contacts. A method for forming a precursor material for use in manufacturing an electrical contact is also provided that includes manipulating a plurality of wires so as to interlace the wires into a unitary structure. The unitary structure is then annealed. An electrical contact may then be formed from the precursor material by elastically rolling a portion of the unitary structure so as to form a tube, annealing the tube, and then cutting the unitary structure so as to release the tube thereby to form an electrical contact. An electrical contact may also be formed by folding a portion of the unitary structure so as to form one or more pleats, annealing the pleated unitary structure, and then cutting the pleated unitary structure so as to release one or more electrical contacts. The precursor material may also be formed by photo-etching a sheet of conductive material so as to form a mesh, and then annealing the mesh. A connector system may be formed including a housing defining a plurality of openings that are each filled with an electrical contact comprising a plurality of interlaced and annealed wires that have been previously either rolled or pleated.
Abstract:
A connector system including first housing having a first header, the first header including one or more conductive pads that are in electrical communication with a conductor. A second housing that is mateable with the first housing and includes a second header positioned on a mating face. The second header includes one or more conductive pad that are electrically engaged with a conductor and positioned in confronting relation with the one or more conductive pads of the first header. An interposer located between the first header and the second header, with a woven contact that extends continuously through the interposer toward conductive pads on the first and second headers. The interposer is movable between a first position where the woven contact is spaced away from the at least one of the conductive pads, and a second position where woven contact electrically engages one of the conductive pads.
Abstract:
The present invention provides an electrical contact comprising a first member having spring properties and a second member wrapped around at least a portion of the first member wherein the second member has a greater electrical conductivity than the first member. In one embodiment, a conductor is wrapped around at least a portion of a spring. In another embodiment, the spring is formed into a coil or helix with a wire wrapped around at least a portion of the helical spring. In one form of this embodiment, the spring has a plurality of turns and the wire is wrapped around at least two of the turns. In another form of this embodiment, the spring has a plurality of turns and the wire is wrapped around all of the turns. An interposer connector is also provided having a frame including a top surface and a bottom surface and a plurality of apertures arranged in a pattern and opening onto the top and bottom surfaces of the frame. A plurality of springs are provided with each spring having a conductor wrapped around at least a portion of the spring where the conductor has a greater electrical conductivity than the spring. One of the springs is positioned within each of the apertures so that at least a portion of each of the conductors is exposed above the top and bottom surfaces of the frame.
Abstract:
The present invention provides an electronic package for high speed, high performance semiconductors. It includes a plurality of devices, circuit members and short interconnections between the circuit members for maintaining high electrical performance. Suitable applications requiring high speed, impedance-controlled transmission line buses throughout the entire package include microprocessor and digital signal processor data buses, and high speed memory buses for products such as laptop and handheld computing and telecommunications devices. Circuit members include printed circuit boards and circuit modules, and may be formed from a wide variety of materials with unpacked or packed semiconductors attached directly to the circuit members. Through the use of clamps the package is at least factory reworkable and can be field separable. Thermal management structures may be included to maintain the high density devices within a reliable range of operating temperatures.
Abstract:
The present invention features a memory module for use in conjunction with high speed, impedance-controlled buses. Each memory card may be a conventional printed circuit card with memory chips attached directly thereto. Alternately, high density memory modules assembled from pluggable sub-modules may be used. These sub-modules may be temporarily assembled for testing and/or burn-in. Bus terminations mounted directly on the memory card or the memory module eliminate the need for bus exit connections, allowing the freed-up connection capacity to be used to address additional memory capacity on the module. An innovative pin-in-hole contact system is used both to connect sub-modules to the memory module and, optionally, to connect the memory module to a motherboard or similar structure. A thermal control structure may be placed in the memory module, cooling the increased number of memory chips to prevent excess heat build-up and ensure reliable memory operation.
Abstract:
The present invention features methods and apparatuses for sealing tiled, flat-panel displays (FPDs). Tile edges corresponding with the display's perimeter edges are designed with a wide seal. Interior edges, however, have narrow seals in order to maintain the desired, constant, pixel pitch across tile boundaries. In some cases, this invention applies specifically to arrays of tiles 2.times.2 or less, and, in other cases, to N.times.M arrays, where N and M are any integer numbers. The tiles are enclosed with top and bottom glass plates, which are sealed with an adhesive bond to the tiles on the outside perimeter of the tiled display. Vertical seams (where tiles meet at the perimeter of the FPD) are sealed with a small amount of polymer. The seal may be constructed between a cover plate and a back plate, sandwiching the tiles. The AMLCD edges may be coated with either a non-permeable material or a polymer having an extremely low permeability (for example, Parylene.TM.). Alternatively, the edge sealing of individual tiles can be achieved by using a metallized film adhesive that is bonded to the tile edges. A low-temperature, sintered Solgel can be used to achieve extremely narrow, yet mechanically strong, seals for individual tiles. Still another enhancement employs a metallurgical seal outside a narrow, polymer seal.
Abstract:
A panel display includes a common substrate on which a plurality of small display tiles are mounted in an array and electrically interconnected to replicate a large area panel. Each tile includes a plurality of contact pads which are aligned with corresponding contact pads on the substrate. Solder joints between corresponding contact pads mechanically align and secure the tiles on the substrate, and provide electrical connections therebetween. Selected substrate contact pads are electrically interconnected to provide electrical connections between adjacent tiles.