公开(公告)号：JP2013211526A

公开(公告)日：2013-10-10

申请号：JP2013007797

申请日：2013-01-18

Applicant: Fujikura Ltd ,  株式会社フジクラ

Inventor： OKAMOTO MASAHIRO

IPC: H05K3/46

CPC classification number: H05K1/0206 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/5389 ,  H01L2224/04105 ,  H01L2224/18 ,  H01L2224/19 ,  H01L2224/2518 ,  H01L2224/73267 ,  H01L2224/9222 ,  H01L2924/0002 ,  H05K1/186 ,  H05K3/4069 ,  H05K3/429 ,  H05K3/4614 ,  H05K3/4697 ,  H05K2201/0154 ,  Y10T29/49139 ,  H01L2924/00

Abstract: PROBLEM TO BE SOLVED: To improve a heat radiation characteristic with a simple structure.SOLUTION: A component built-in substrate 1 has such a structure that first to fourth printed wiring substrates 10-40 are collectively laminated by thermal compression bonding. Wiring 12 for signals and heat-radiating wiring 13 that are pattern-formed are formed on a surface of the first printed wiring substrate 10, and are connected to a via 14 for signals made of conductive paste filled in the via hole 2 formed on a first resin substrate 11, and a heat-radiating via 15 formed in a via hole 4 with a larger diameter than that of the via hole 2. An electronic component 90 is built in an opening 29 formed on a second resin substrate 21 of the second printed wiring substrate 20 while a rear surface 91a is connected to the heat-radiating via 15. Heat of the electronic component 90 is radiated from the heat-radiating wiring 13 via the heat-radiating via 15 of a large diameter contacting the rear surface 91a of the electronic component 90.

Abstract translation: 要解决的问题：以简单的结构提高散热特性。解决方案：内置基板1的结构使得第一至第四印刷布线基板10-40通过热压接而共同层叠。 在第一印刷布线基板10的表面上形成图形形成的信号用布线12和散热布线13，并且与通孔14连接，用于由填充在形成于 第一树脂基板11和形成在通孔4中的散热通孔15，该通孔4的直径大于通孔2的直径。电子部件90内置在形成在第二树脂基板21的第二树脂基板21上的开口29中 印刷布线基板20，而后表面91a连接到散热通孔15.电子部件90的热量经由与后表面91a接触的大直径的散热通道15从散热布线13辐射 的电子部件90。

公开(公告)号：JP2013077714A

公开(公告)日：2013-04-25

申请号：JP2011216996

申请日：2011-09-30

Applicant: Fujikura Ltd ,  株式会社フジクラ

Inventor： YAMAGISHI HIROYUKI ,  KATSURA GO ,  OKAMOTO MASAHIRO ,  SANO NOBUNORI

IPC: H01L21/67 ,  H01L21/301

Abstract: PROBLEM TO BE SOLVED: To provide a semiconductor chip push-up piece which can be released from dicing tape without trouble even if a semiconductor chip is small.SOLUTION: A semiconductor chip push-up piece (2) is pushed up in a direction of a center axial line (CL) with respect to a lower surface (DTb) of an adhesive tape (DT) in order to release a semiconductor chip (51a) deposited on the adhesive tape (DT) from the adhesive tape (DT). Furthermore, the semiconductor chip push-up piece comprises a flat surface (2t) and four flat surfaces (2h1-2h4). The flat surface (2t) is a part of a first plane orthogonal to a center axial line (CL2) and the edge thereof includes four sides (2tb1-2tb4) such that neighboring sides are orthogonal with each other. The four flat surfaces (2h1-2h4) are erected in four corners of the flat surface (2t), respectively and a distal end portion includes four projecting portions (2b1-2b4) and four sides (2ta-2td) included in a second plane parallel with the first plane, respectively. The four flat surfaces (2h1-2h4) are inclined in a direction away from the first plane as separated from the center axial line (CL2).

Abstract translation: 要解决的问题：即使半导体芯片小，也可以提供可以从切割带释放的半导体芯片上推片。 解决方案：半导体芯片上推片（2）相对于胶带（DT）的下表面（DTb）在中心轴线（CL）的方向上被向上推，以便释放 半导体芯片（51a）从粘合带（DT）沉积在粘合带（DT）上。 此外，半导体芯片上推片包括平坦表面（2t）和四个平坦表面（2h1-2h4）。 平面（2t）是与中心轴线（CL2）正交的第一平面的一部分，其边缘包括四边（2tb1-2tb4），使得相邻的边彼此正交。 四个平面（2h1-2h4）分别竖立在平面（2t）的四个角部，前端部包括四个突出部（2b1-2b4）和包含在第二平面中的四个侧面（2ta-2td） 分别与第一平面平行。 四个平坦表面（2h1-2h4）在与中心轴线（CL2）分离的方向上从远离第一平面的方向倾斜。 版权所有（C）2013，JPO＆INPIT

公开(公告)号：JP2013055109A

公开(公告)日：2013-03-21

申请号：JP2011190527

申请日：2011-09-01

Applicant: Fujikura Ltd ,  株式会社フジクラ

Inventor： SANO NOBUNORI ,  OKAMOTO MASAHIRO

IPC: H05K3/46 ,  H05K3/00

Abstract: PROBLEM TO BE SOLVED: To provide a substrate with a built-in component, in which an opening for incorporating an electronic component therein can be made small.SOLUTION: A substrate with a built-in component 10 includes: a first substrate 3A in which a first conductive layer 4c1 is formed on a first insulating layer 3c and an interlayer conduction part 1c2 is formed in the first insulating layer 3c; an electronic component 2 connected to the interlayer conduction part 1c2; and a second substrate 2A in which a second conductive layer 4b1 is formed on a second insulating layer 3b and which has an opening 6 at a position where the electronic component 2 is to be incorporated. The second conductive layer 4b1 includes a frame-shaped part 7b1 having a frame shape in a plan view. The opening 6 is formed to penetrate the second insulating layer 3b in the thickness direction in an entire inner region 8b1 of the frame-shaped part 7b1.

Abstract translation: 要解决的问题：为了提供具有内置部件的基板，其中可以使用于其中结合电子部件的开口较小。 解决方案：具有内置部件10的基板包括：第一基板3A，其中第一导电层4c1形成在第一绝缘层3c上，层间导电部分1c2形成在第一绝缘层3c中; 连接到层间导电部分1c2的电子部件2; 以及第二基板2A，其中第二导电层4b1形成在第二绝缘层3b上，并且在要组装电子元件2的位置处具有开口6。 第二导电层4b1包括在平面图中具有框架形状的框状部分7b1。 开口6形成为在框状部7b1的内部区域8b1的整个厚度方向上贯通第二绝缘层3b。 版权所有（C）2013，JPO＆INPIT

公开(公告)号：JP2006202891A

公开(公告)日：2006-08-03

申请号：JP2005011483

申请日：2005-01-19

Applicant: Fujikura Ltd ,  株式会社フジクラ

Inventor： OKAMOTO MASAHIRO

IPC: H05K3/46

CPC classification number: H05K3/4691 ,  H05K3/429

Abstract: PROBLEM TO BE SOLVED: To prevent flowing out or oozing of an interlayer adhesive agent in a rigid part to a flexible part without difficulty for downsizing a rigid flexible printed wiring board.
SOLUTION: The rigid flexible printed wiring board is comprised of a flexible part wherein a wiring circuit is formed on a flexible resin substrate, and a rigid part wherein a hard resin substrate is stuck on the flexible resin substrate by means of an interlayer adhesive agent and electronic components. In the method for manufacturing the rigid flexible printed wiring board, the end of the interlayer adhesive agent 6 is moved farther backward to the rigid 2 side than the end of the hard resin substrate 4 forming the rigid 2, so that, even if the hard resin substrate 4 heated and pressurized to be stuck to the flexible resin substrate 3 by a cure press, the interlayer adhesive agent 6 is hard to ooze to the flexible part 1.
COPYRIGHT: (C)2006,JPO&NCIPI

Abstract translation: 要解决的问题：为了防止刚性部分中的层间粘合剂向柔性部分流出或渗出，而难以将刚性柔性印刷线路板小型化。 解决方案：刚性柔性印刷线路板包括柔性部件，其中布线电路形成在柔性树脂基板上，刚性部分通过中间层将硬树脂基板粘附在柔性树脂基板上 粘合剂和电子元件。 在制造刚性柔性印刷电路板的方法中，层间粘合剂6的端部比形成刚性2的硬质树脂基板4的端部更向后移动到刚性2侧，使得即使硬 树脂基板4通过固化压力加热加压粘合到柔性树脂基板3上，层间粘合剂6难以渗透到柔性部分1.版权所有（C）2006，JPO＆NCIPI

公开(公告)号：JP2006108495A

公开(公告)日：2006-04-20

申请号：JP2004295050

申请日：2004-10-07

Applicant: Fujikura Ltd ,  株式会社フジクラ

Inventor： OKAMOTO MASAHIRO

IPC: H05K3/46

Abstract: PROBLEM TO BE SOLVED: To provide a base material for a multilayer wiring board which can suppress the floating of a resin layer in a process of heating press at the time of manufacturing the multilayer wiring board as to multilayer wiring board base materials constituting the multilayer wiring board, and to provide the multilayer wiring board capable of preventing an adhesive material from seeping out and improving the size stability of materials by manufacturing the multilayer wiring board by using the multilayer wiring board base materials.
SOLUTION: In each of the multilayer wiring board base materials 10 constituting the multilayer wiring board, mesh-like resin films 4 are included in an adhesive layer 5 formed to stick respective base materials 10. The multilayer wiring board base materials 10 are laminated and pressed with heat to manufacture the multilayer wiring board.
COPYRIGHT: (C)2006,JPO&NCIPI

Abstract translation: 解决的问题：提供一种多层布线基板的基材，该多层布线基板在制造多层布线板时能够抑制加热冲压加工过程中的树脂层浮起，从而构成多层布线基板基材 并且提供能够通过使用多层布线板基材制造多层布线板来防止粘合剂材料渗出并提高材料的尺寸稳定性的多层布线板。 ＆lt; P＆gt;解决方案：在构成多层布线板的每个多层布线基板材料10中，网状树脂膜4包括在形成为粘贴各个基材10的粘合剂层5中。多层布线基板材料10是 层叠并热压制造多层布线板。 版权所有（C）2006，JPO＆NCIPI

公开(公告)号：JP2005175285A

公开(公告)日：2005-06-30

申请号：JP2003415096

申请日：2003-12-12

Applicant: Fujikura Ltd ,  株式会社フジクラ

Inventor： OKAMOTO MASAHIRO

IPC: H05K3/46

Abstract: PROBLEM TO BE SOLVED: To restrain the transformation of a viahole and to form the viahole with a sufficient yield and utilize an improved effect of connection reliability between the viahole and a copper circuit by using nano paste, in a multilayer wiring board wherein the nano paste is used as a conductor of the viahole for interlayer conduction.
SOLUTION: A strut component 26 which restrains the transformation of the nano paste 25 is formed in the viahole 24. Since conductive paste with which the viahole is filled up, conductive paste called the nano paste which contains filler metal whose mean particle diameter is 1-100 nm is used. It is preferable that the strut component has compressive strength-proof suitably. The strut component is constituted of an object wherein the conductive paste of a polymer type is cured which uses silver or copper or a copper particle whose surface is coated with silver as filler metal, or constituted of a metal body grown up by solder plating.
COPYRIGHT: (C)2005,JPO&NCIPI

Abstract translation: 要解决的问题为了抑制通孔的变形并以足够的产率形成通孔，并且通过使用纳米糊将利用改进的通孔和铜电路之间的连接可靠性的效果，在多层布线板中，其中 纳米糊剂用作通孔用于层间导电的导体。 解决方案：在通孔24中形成限制纳米糊状物25的转变的支柱成分26.由于填充有通孔的导电浆料，称为纳米糊状物的导电糊料，其含有填充金属，其平均粒径 使用1-100nm。 优选地，支柱部件适当地具有抗压强度。 支柱部件由其中使用银或铜的聚合物类型的导电糊料或其表面涂覆有银作为填充金属的铜颗粒或由通过焊料电镀生长的金属体构成的物体构成。 版权所有（C）2005，JPO＆NCIPI

公开(公告)号：JP2004314430A

公开(公告)日：2004-11-11

申请号：JP2003111497

申请日：2003-04-16

Applicant: Fujikura Ltd ,  株式会社フジクラ

Inventor： KUZUU KIYOSHI ,  INOUE KOICHI ,  SUZUKI ISAO ,  NAGATA MASAKATSU ,  OKAMOTO MASAHIRO

IPC: B32B37/20 ,  B32B15/08 ,  B32B31/08

Abstract: PROBLEM TO BE SOLVED: To provide a precise lamination method for automatically laminating many layers increased in the number of sheets to be laminated, that is, a plurality of copper clad laminated panel sheets, and an apparatus therefor. SOLUTION: The first copper clad laminated panel sheet W1 is set on a first stage made movable up and down at the position of a lower dead point while a second copper clad laminated panel sheet W2 is set on a second stage 3. In a state that the second stage 3 is revolved to be opposed to the first stage 11 from above, the first stage 11 is raised by the distance (L-nt) calculated by subtracting the thickness (t) of the first copper clad laminated panel sheet W1 and the thickness (t) of the second copper clad laminated panel sheet W2 from the preset distance L between the upper surface of the first stage 11 and the under surface of the second stage 3 to laminate n layers of the second copper clad laminated panel sheets W2 on the first copper clad laminated panel sheet W1. COPYRIGHT: (C)2005,JPO&NCIPI

公开(公告)号：JP2004266094A

公开(公告)日：2004-09-24

申请号：JP2003054563

申请日：2003-02-28

Applicant: Fujikura Ltd ,  株式会社フジクラ

Inventor： OKAMOTO MASAHIRO

IPC: H05K3/46

Abstract: PROBLEM TO BE SOLVED: To obtain a multilayer wiring board having low electrical resistance in a multilayer connection electric circuit, and superior in the electrical characteristics.
SOLUTION: An interlayer conductive viahole 18 is formed by the combined body of metal powder, and a projecting part 18A which projects to the outside of the multilayered adhesive face of an ahdesive layer 13 is made of by the combined body of the metal powder.
COPYRIGHT: (C)2004,JPO&NCIPI

公开(公告)号：JP2004235243A

公开(公告)日：2004-08-19

申请号：JP2003019166

申请日：2003-01-28

Applicant: Fujikura Ltd ,  株式会社フジクラ

Inventor： NAGATA MASAKATSU ,  NAKAO SATORU ,  WATANABE TARO ,  OKAMOTO MASAHIRO ,  ITO SHOJI

IPC: H05K3/46

Abstract: PROBLEM TO BE SOLVED: To obtain high laminating accuracy regardless of the mechanical strength of an insulating substrate (base material) and the number of laminated substrates. SOLUTION: Substrates 10 for multilayered wiring are laminated upon another by passing alignment pins 101 through through holes 19 for alignment formed in conductive paste 18 packed in through holes formed through the insulating substrates 11 at positions separated from the wiring pattern sections 12 of the substrates 11. Since the conductive paste 18 exists around the through holes 19 for alignment and forms annular eyelets, the portions containing the through holes 19 are reinforced mechanically. COPYRIGHT: (C)2004,JPO&NCIPI

公开(公告)号：JP2004221432A

公开(公告)日：2004-08-05

申请号：JP2003008832

申请日：2003-01-16

Applicant: Fujikura Ltd ,  株式会社フジクラ

Inventor： WATANABE TARO ,  ITO SHOJI ,  OKAMOTO MASAHIRO

IPC: H05K3/40

Abstract: PROBLEM TO BE SOLVED: To electrically connect conductors together disposed on both surfaces of an insulating layer with sure, with a conductive paste which is in uncured state before a heating process being hard to drop off, and to establish electrical continuity between circuit layers.
SOLUTION: A circuit board (1) electrically connects conductors (8) and (9) disposed on both surfaces of an insulating layer (2) with a through hole (5) formed in the insulating layer (2) in between, through a conductive paste (7) which is packed in the through hole (5) and cured. A core member (6) that contacts at least to one of the conductors (8) and (9) is provided in the through hole (5).
COPYRIGHT: (C)2004,JPO&NCIPI

Abstract translation: 要解决的问题：为了在绝缘层的两个表面上绝缘性地将导体电连接在一起，在加热处理难以脱落之前处于未固化状态的导电膏，并且在电路之间建立电连续性 层。 电路板（1）将布置在绝缘层（2）的两个表面上的导体（8）和（9）与形成在绝缘层（2）中的通孔（5）电连接在一起， 通过填充在通孔（5）中并固化的导电浆料（7）。 在通孔（5）中设置与至少一个导体（8）和（9）接触的芯体（6）。 版权所有（C）2004，JPO＆NCIPI