公开(公告)号：EP3042293A1

公开(公告)日：2016-07-13

申请号：EP14843012.7

申请日：2014-08-25

Applicant: Intel Corporation

Inventor： MOZAK, Christopher P. ,  MCCALL, James A.

IPC: G06F13/14 ,  G06F11/16

CPC classification number: G06N99/005 ,  G05B13/02 ,  G11C7/1093 ,  G11C29/022 ,  G11C29/028 ,  G11C2029/0409 ,  G11C2207/2254

Abstract: I/O parameters are adjusted based on a number of errors detected in a received training signal. A controller device sends the training signal while a memory device is in a training mode. The memory device samples the training signal and the system causes an adjustment to at least one I/O parameter based on a detected number of errors. Either the controller or the memory device can perform the error detection, depending on the configuration of the system. Either an I/O parameter of the controller or an I/O parameter of the memory device can be adjusted, depending on the configuration of the system.