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41.
公开(公告)号:US20220014381A1
公开(公告)日:2022-01-13
申请号:US17448520
申请日:2021-09-22
Applicant: Intel Corporation
Inventor: Bin Xing
Abstract: A system and method of MAC generation include receiving, by a destination computing system, an encrypted page from a source computing system; decrypting the encrypted page; adding version data for the decrypted page to a receiver message authentication code (MAC) for the decrypted page; receiving a sender MAC corresponding to the encrypted page received from the source computing system, the sender MAC including version data for the encrypted page; comparing the sender MAC to the receiver MAC; and indicating an error when the sender MAC does not match the receiver MAC and indicating a success when the sender MAC matches the receiver MAC.
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公开(公告)号:US10943012B2
公开(公告)日:2021-03-09
申请号:US16260850
申请日:2019-01-29
Applicant: Intel Corporation
Inventor: Pradeep M. Pappachan , Reshma Lal , Bin Xing , Siddhartha Chhabra , Vincent R. Scarlata , Steven B. McGowan
Abstract: Technologies for trusted I/O attestation and verification include a computing device with a cryptographic engine and one or more I/O controllers. The computing device collects hardware attestation information associated with statically attached hardware I/O components that are associated with a trusted I/O usage protected by the cryptographic engine. The computing device verifies the hardware attestation information and securely enumerates one or more dynamically attached hardware components in response to verification. The computing device collects software attestation information for trusted software components loaded during secure enumeration. The computing device verifies the software attestation information. The computing device may collect firmware attestation information for firmware loaded in the I/O controllers and verify the firmware attestation information. The computing device may collect application attestation information for a trusted application that uses the trusted I/O usage and verify the application attestation information. Other embodiments are described and claimed.
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公开(公告)号:US10726165B2
公开(公告)日:2020-07-28
申请号:US16417907
申请日:2019-05-21
Applicant: Intel Corporation
Inventor: Soham Jayesh Desai , Reshma Lal , Pradeep Pappachan , Bin Xing
Abstract: Technologies for secure enumeration of USB devices include a computing device having a USB controller and a trusted execution environment (TEE). The TEE may be a secure enclave protected secure enclave support of the processor. In response to a USB device connecting to the USB controller, the TEE sends a secure command to the USB controller to protect a device descriptor for the USB device. The secure command may be sent over a secure channel to a static USB device. A driver sends a get device descriptor request to the USB device, and the USB device responds with the device descriptor. The USB controller redirects the device descriptor to a secure memory buffer, which may be located in a trusted I/O processor reserved memory region. The TEE retrieves and validates the device descriptor. If validated, the TEE may enable the USB device for use. Other embodiments are described and claimed.
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公开(公告)号:US10511598B2
公开(公告)日:2019-12-17
申请号:US15083988
申请日:2016-03-29
Applicant: Intel Corporation
Inventor: Mark W. Shanahan , Bin Xing
IPC: H04L29/06 , G06F12/14 , G06F21/74 , G06F12/08 , G06F12/0875
Abstract: Technologies for dynamic loading of integrity protected modules into a secure enclave include a computing device having a processor with secure enclave support. The computing device divides an executable image into multiple chunks, hashes each of the chunks with corresponding attributes that affect security to generate a corresponding hash value, and generates a hash tree as a function of the hash values. The computing device generates an initial secure enclave memory image that includes the root value of the hash tree. At runtime, the computing device accesses a chunk of the executable image from within the secure enclave, which generates a page fault. In response to the page fault, the secure enclave verifies the associated chunk based on the hash tree and accepts the chunk into the secure enclave in response to successful verification. The root value of the hash tree is integrity-protected. Other embodiments are described and claimed.
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公开(公告)号:US10354095B2
公开(公告)日:2019-07-16
申请号:US15087029
申请日:2016-03-31
Applicant: Intel Corporation
Inventor: Bin Xing
Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to initialize enclaves on target processors. An example apparatus includes an image file retriever to retrieve configuration parameters associated with an enclave file, and an address space manager to calculate a minimum virtual address space value for an enclave image layout based on the configuration parameters, and generate an optimized enclave image layout to allow enclave image execution on unknown target processor types by multiplying the minimum address space value with a virtual address factor to determine an optimized virtual address space value for the optimized enclave image layout.
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公开(公告)号:US10339327B2
公开(公告)日:2019-07-02
申请号:US15628012
申请日:2017-06-20
Applicant: Intel Corporation
Inventor: Pradeep M. Pappachan , Reshma Lal , Siddhartha Chhabra , Gideon Gerzon , Baruch Chaikin , Bin Xing , William A. Stevens, Jr.
IPC: G06F21/76 , G06F21/60 , H04L29/06 , G06F21/57 , G06F13/28 , H04L9/32 , G06F13/20 , G06F21/62 , G06F21/85 , G09C1/00 , G06F21/70 , G06F21/51 , H04L9/06
Abstract: Technologies for securely binding a manifest to a platform include a computing device having a security engine and a field-programmable fuse. The computing device receives a platform manifest indicative of a hardware configuration of the computing device and a manifest hash. The security engine of the computing device blows a bit of a field programmable fuse and then stores the manifest hash and a counter value of the field-programmable fuse in integrity-protected non-volatile storage. In response to a platform reset, the security engine verifies the stored manifest hash and counter value and then determines whether the stored counter value matches the field-programmable fuse. If verified and current, trusted software may calculate a hash of the platform manifest and compare the calculated hash to the stored manifest hash. If matching, the platform manifest may be used to discover platform hardware. Other embodiments are described and claimed.
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公开(公告)号:US10289554B2
公开(公告)日:2019-05-14
申请号:US15711615
申请日:2017-09-21
Applicant: Intel Corporation
Inventor: Rebekah M. Leslie-Hurd , Carlos V. Rozas , Francis X. Mckeen , Ilya Alexandrovich , Vedvyas Shanbhogue , Bin Xing , Mark W. Shanahan , Simon P. Johnson
IPC: G06F12/0844 , G06F12/0882 , G06F11/07
Abstract: A processor implementing techniques to supporting fault information delivery is disclosed. In one embodiment, the processor includes a memory controller unit to access an enclave page cache (EPC) and a processor core coupled to the memory controller unit. The processor core to detect a fault associated with accessing the EPC and generate an error code associated with the fault. The error code reflects an EPC-related fault cause. The processor core is further to encode the error code into a data structure associated with the processor core. The data structure is for monitoring a hardware state related to the processor core.
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公开(公告)号:US20190065406A1
公开(公告)日:2019-02-28
申请号:US16174337
申请日:2018-10-30
Applicant: Intel Corporation
Inventor: Michael Steiner , Thomas Knauth , Li Lei , Bin Xing , Mona Vij , Somnath Chakrabarti
Abstract: In a method for protecting extra-enclave communications, a data processing system allocates a portion of random access memory (RAM) to a server application that is to execute at a low privilege level, and the data processing system creates an enclave comprising the portion of RAM allocated to the server application. The enclave protects the RAM in the enclave from access by software that executes at a high privilege level. The server application obtains a platform attestation report (PAR) for the enclave from the processor. The PAR includes attestation data from the processor attesting to integrity of the enclave. The server application also generates a public key certificate for the server application. The public key certificate comprises the attestation data. The server application utilizes the public key certificate to establish a transport layer security (TLS) communication channel with a client application outside of the enclave. Other embodiments are described and claimed.
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公开(公告)号:US09933968B2
公开(公告)日:2018-04-03
申请号:US14701228
申请日:2015-04-30
Applicant: INTEL CORPORATION
Inventor: Bin Xing
IPC: G06F12/02 , G06F12/10 , G06F3/06 , G06F21/74 , G06F21/53 , G06F12/0866 , G06F12/0802 , G06F12/08
CPC classification number: G06F3/0634 , G06F3/0623 , G06F3/0644 , G06F3/0664 , G06F3/0673 , G06F12/0223 , G06F12/08 , G06F12/0802 , G06F12/0866 , G06F12/10 , G06F21/53 , G06F21/74 , G06F2212/1041 , G06F2212/1056 , G06F2221/033
Abstract: A system and method for adapting a secure application execution environment to support multiple configurations includes determining a maximum configuration for the secure application execution environment, determining an optimal configuration for the secure application environment, and, at load time, configuring the secure application execution environment for the optimal configuration.
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公开(公告)号:US20170091445A1
公开(公告)日:2017-03-30
申请号:US14866856
申请日:2015-09-26
Applicant: Intel Corporation
Inventor: Bin Xing , Krystof C. Zmudzinski , Wei Wu , Shih-Lien L. Lu , Carlos V. Rozas , Francis X. McKeen , Siddhartha Chhabra , Mark W. Shanahan
IPC: G06F21/53
CPC classification number: G06F21/53 , G06F21/79 , G06F2221/033
Abstract: Technologies for software attack detection include a computing device with a processor and a memory external to the processor. The processor originates a memory transaction with an associated secure enclave status bit that indicates whether the memory transaction originated in a secure execution mode, such as from a secure enclave. The processor computes an error-correcting code (ECC) based as a function of memory transaction data and the secure enclave status bit, and performs the memory transaction based on the ECC and the memory transaction data using the memory of the computing device. The processor may store the ECC and the memory transaction data to memory. The processor may load a stored ECC and data from the memory and compare the computed ECC to the stored ECC to detect memory transactions with an invalid secure enclave status bit. Other embodiments are described and claimed.
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