公开(公告)号：US20200312978A1

公开(公告)日：2020-10-01

申请号：US16363952

申请日：2019-03-25

Applicant: Intel Corporation

Inventor： Jack KAVALIEROS ,  Ian YOUNG ,  Matthew METZ ,  Uygar AVCI ,  Chia-Ching LIN ,  Owen LOH ,  Seung Hoon SUNG ,  Aditya KASUKURTI ,  Sou-Chi CHANG ,  Tanay GOSAVI ,  Ashish Verma PENUMATCHA

IPC: H01L29/51 ,  H01L29/66 ,  H01L29/78 ,  G09G3/36 ,  G02F1/141 ,  H01L21/28

Abstract: Techniques and mechanisms for providing electrical insulation or other protection of an integrated circuit (IC) device with a spacer structure which comprises an (anti)ferromagnetic material. In an embodiment, a transistor comprises doped source or drain regions and a channel region which are each disposed in a fin structure, wherein a gate electrode and an underlying dielectric layer of the transistor each extend over the channel region. Insulation spacers are disposed on opposite sides of the gate electrode, where at least a portion of one such insulation spacer comprises an (anti)ferroelectric material. Another portion of the insulation spacer comprises a non-(anti)ferroelectric material. In another embodiment, the two portions of the spacer are offset vertically from one another, wherein the (anti)ferroelectric portion forms a bottom of the spacer.

公开(公告)号：US20200312949A1

公开(公告)日：2020-10-01

申请号：US16368450

申请日：2019-03-28

Applicant: Intel Corporation

Inventor： Nazila HARATIPOUR ,  Chia-Ching LIN ,  Sou-Chi CHANG ,  Ashish Verma PENUMATCHA ,  Owen LOH ,  Mengcheng LU ,  Seung Hoon SUNG ,  Ian A. YOUNG ,  Uygar AVCI ,  Jack T. KAVALIEROS

IPC: H01L49/02 ,  H01G4/30 ,  H01G4/012 ,  H01L27/11585 ,  H01L23/522

Abstract: A capacitor is disclosed. The capacitor includes a first metal layer, a second metal layer on the first metal layer, a ferroelectric layer on the second metal layer, and a third metal layer on the ferroelectric layer. The second metal layer includes a first non-reactive barrier metal and the third metal layer includes a second non-reactive barrier metal. A fourth metal layer is on the third metal layer.

公开(公告)号：US20200227105A1

公开(公告)日：2020-07-16

申请号：US16246362

申请日：2019-01-11

Applicant: Intel Corporation

Inventor： Tanay GOSAVI ,  Sasikanth MANIPATRUNI ,  Chia-Ching LIN ,  Kaan OGUZ ,  Ian YOUNG

IPC: G11C11/16 ,  H01L43/12 ,  H01L43/10 ,  H01L43/08 ,  H01L43/02

Abstract: A memory device includes a spin orbit electrode structure having a dielectric structure including a first sidewall, a second sidewall opposite to the first sidewall, a top surface. The spin orbit electrode structure further includes an electrode having a spin orbit material adjacent to the dielectric structure, where the electrode has a first electrode portion on the top surface, a second electrode portion adjacent to the first sidewall and a third electrode portion adjacent to the second sidewall. The first electrode portion, the second electrode portion and the third electrode portion are contiguous. The spin orbit electrode structure further includes a conductive interconnect in contact with the second electrode portion or the third electrode portion. The memory device further includes a magnetic junction device on a portion of the top surface of the first electrode portion.

公开(公告)号：US20200212291A1

公开(公告)日：2020-07-02

申请号：US16236060

申请日：2018-12-28

Applicant: Intel Corporation

Inventor： Chia-Ching LIN ,  Sasikanth MANIPATRUNI ,  Tanay GOSAVI ,  Dmitri NIKONOV ,  Kaan OGUZ ,  Ian A. YOUNG

IPC: H01L43/02 ,  H01L43/10 ,  H01L43/12 ,  H01L27/22 ,  H01F10/32 ,  H01L27/11 ,  G11C11/16 ,  G11C11/14

Abstract: A memory device comprises an interconnect comprises a spin orbit coupling (SOC) material. A free magnetic layer is on the interconnect, a barrier material is over the free magnetic layer and a fixed magnetic layer is over the barrier material, wherein the free magnetic layer comprises an antiferromagnet. In another embodiment, memory device comprises a spin orbit coupling (SOC) interconnect and an antiferromagnet (AFM) free magnetic layer is on the interconnect. A ferromagnetic magnetic tunnel junction (MTJ) device is on the AFM free magnetic layer, wherein the ferromagnetic MTJ comprises a free magnet layer, a fixed magnet layer, and a barrier material between the free magnet layer and the fixed magnet layer.